Inventor

JHAN YI-RUEI

TW42 patents

⚠️ This page may combine multiple inventors who share the name “JHAN YI-RUEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JHAN YI-RUEI

TAIWAN SEMICONDUCTOR MFG CO LTD

Seam free isolation structures and method for making the same

Field effect transistor with fin isolation structure and method

Method for FinFET fabrication and structure thereof

Semiconductor device and method of manufacturing the same

Multi-gate device and related methods

Methods of reducing gate spacer loss during semiconductor manufacturing

Method for forming sidewall spacers disposed above mask layer and semiconductor devices fabricated thereof

Semiconductor devices with fin-top hard mask and methods for fabrication thereof

Multi-gate device and related methods

Semiconductor device structure and methods of forming the same

Method for manufacturing semiconductor structure with dielectric feature

Semiconductor devices with Fin-top hard mask and methods for fabrication thereof

Semiconductor devices and methods of manufacturing thereof

Method for forming sidewall spacers and semiconductor devices fabricated thereof

Multi-gate device and related methods

Semiconductor devices with fin-top hard mask and methods for fabrication thereof

Semiconductor device structure and methods of forming the same

Method for forming sidewall spacers and semiconductor devices fabricated thereof

Multi-gate device and method of fabrication thereof

Semiconductor devices and methods of manufacturing thereof

Semiconductor devices with implanted STI regions and methods of forming the same

Semiconductor device and method of manufacturing the same

Gate isolation feature and manufacturing method thereof

Method for FinFet fabrication and structure thereof

FinFET pitch scaling

Semiconductor fabrication system embedded with effective baking module

Gate isolation feature and manufacturing method thereof

Semiconductor device and method of manufacturing the same

Methods of reducing gate spacer loss during semiconductor manufacturing

FinFET pitch scaling

Semiconductor fabrication system embedded with effective baking module

Method for FinFET fabrication and structure thereof

Semiconductor device structure with air gap and method for forming the same

Semiconductor and method for manufacturing the same

Convergent fin and nanostructure transistor structure and method

Nanostructures formed over a substrate and a gate structure wrapping around the nanostructures

Field effect transistor with inactive fin and method

Gate isolation for multigate device

Gate isolation feature and manufacturing method thereof

Method for forming semiconductor device

Semiconductor device interconnects and methods of formation

NAT UNIV TSING HUA

Tunneling transistor with asymmetric gate