P

Inventor

DERHACOBIAN NARBEH

US57 patents
⚠️ This page may combine multiple inventors who share the name “DERHACOBIAN NARBEH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ADVANCED MICRO DEVICES INC

36 patents
US6269023B1Jul 31, 2001

Method of programming a non-volatile memory cell using a current limiter

ADVANCED MICRO DEVICES INC248 citations99
US6215702B1Apr 10, 2001

Method of maintaining constant erasing speeds for non-volatile memory cells

ADVANCED MICRO DEVICES INC279 citations99
US5991202ANov 23, 1999

Method for reducing program disturb during self-boosting in a NAND flash memory

ADVANCED MICRO DEVICES INC334 citations99
US6618290B1Sep 9, 2003

Method of programming a non-volatile memory cell using a baking process

ADVANCED MICRO DEVICES INC85 citations98
US6590811B1Jul 8, 2003

Higher program VT and faster programming rates based on improved erase methods

ADVANCED MICRO DEVICES INC92 citations98
US6541816B2Apr 1, 2003

Planar structure for non-volatile memory devices

ADVANCED MICRO DEVICES INC126 citations98
US6519182B1Feb 11, 2003

Using hot carrier injection to control over-programming in a non-volatile memory cell having an oxide-nitride-oxide (ONO) structure

ADVANCED MICRO DEVICES INC85 citations98
US6468865B1Oct 22, 2002

Method of simultaneous formation of bitline isolation and periphery oxide

ADVANCED MICRO DEVICES INC97 citations98
US6442074B1Aug 27, 2002

Tailored erase method using higher program VT and higher negative gate erase

ADVANCED MICRO DEVICES INC103 citations98
US6529410B1Mar 4, 2003

NAND array structure and method with buried layer

ADVANCED MICRO DEVICES INC99 citations97
US6555436B2Apr 29, 2003

Simultaneous formation of charge storage and bitline to wordline isolation

ADVANCED MICRO DEVICES INC56 citations96
US6465306B1Oct 15, 2002

Simultaneous formation of charge storage and bitline to wordline isolation

ADVANCED MICRO DEVICES INC46 citations96
US6456536B1Sep 24, 2002

Method of programming a non-volatile memory cell using a substrate bias

ADVANCED MICRO DEVICES INC57 citations96
US6356482B1Mar 12, 2002

Using negative gate erase voltage to simultaneously erase two bits from a non-volatile memory cell with an oxide-nitride-oxide (ONO) gate structure

ADVANCED MICRO DEVICES INC55 citations96
US6307784B1Oct 23, 2001

Negative gate erase

ADVANCED MICRO DEVICES INC82 citations96
US6567303B1May 20, 2003

Charge injection

ADVANCED MICRO DEVICES INC104 citations95
US6327183B1Dec 4, 2001

Nonlinear stepped programming voltage

ADVANCED MICRO DEVICES INC65 citations94
US6514830B1Feb 4, 2003

Method of manufacturing high voltage transistor with modified field implant mask

ADVANCED MICRO DEVICES INC43 citations93
US6493261B1Dec 10, 2002

Single bit array edges

ADVANCED MICRO DEVICES INC25 citations93
US6456533B1Sep 24, 2002

Higher program VT and faster programming rates based on improved erase methods

ADVANCED MICRO DEVICES INC62 citations93
US6159795ADec 12, 2000

Low voltage junction and high voltage junction optimization for flash memory

ADVANCED MICRO DEVICES INC36 citations93
US6750157B1Jun 15, 2004

Nonvolatile memory cell with a nitridated oxide layer

ADVANCED MICRO DEVICES INC27 citations92
US6465303B1Oct 15, 2002

Method of manufacturing spacer etch mask for silicon-oxide-nitride-oxide-silicon (SONOS) type nonvolatile memory

ADVANCED MICRO DEVICES INC22 citations92
US6331952B1Dec 18, 2001

Positive gate erasure for non-volatile memory cells

ADVANCED MICRO DEVICES INC20 citations92
US6331953B1Dec 18, 2001

Intelligent ramped gate and ramped drain erasure for non-volatile memory cells

ADVANCED MICRO DEVICES INC38 citations92
US6246610B1Jun 12, 2001

Symmetrical program and erase scheme to improve erase time degradation in NAND devices

ADVANCED MICRO DEVICES INC42 citations92
US5844840ADec 1, 1998

High voltage NMOS pass gate having supply range, area, and speed advantages

ADVANCED MICRO DEVICES INC21 citations92
US6143608ANov 7, 2000

Barrier layer decreases nitrogen contamination of peripheral gate regions during tunnel oxide nitridation

ADVANCED MICRO DEVICES INC39 citations89
US6228782B1May 8, 2001

Core field isolation for a NAND flash memory

ADVANCED MICRO DEVICES INC19 citations88
US6501681B1Dec 31, 2002

Using a low drain bias during erase verify to ensure complete removal of residual charge in the nitride in sonos non-volatile memories

ADVANCED MICRO DEVICES INC18 citations84
US5909396AJun 1, 1999

High voltage NMOS pass gate having supply range, area, and speed advantages

ADVANCED MICRO DEVICES INC16 citations82
US6143612ANov 7, 2000

High voltage transistor with high gated diode breakdown, low body effect and low leakage

ADVANCED MICRO DEVICES INC9 citations74
US6381179B1Apr 30, 2002

Using a negative gate erase to increase the cycling endurance of a non-volatile memory cell with an oxide-nitride-oxide (ONO) structure

ADVANCED MICRO DEVICES INC12 citations73
US6166951ADec 26, 2000

Multi state sensing of NAND memory cells by applying reverse-bias voltage

ADVANCED MICRO DEVICES INC14 citations73
US6549466B1Apr 15, 2003

Using a negative gate erase voltage applied in steps of decreasing amounts to reduce erase time for a non-volatile memory cell with an oxide-nitride-oxide (ONO) structure

ADVANCED MICRO DEVICES INC4 citations63
US6188606B1Feb 13, 2001

Multi state sensing of NAND memory cells by varying source bias

ADVANCED MICRO DEVICES INC4 citations62

DERHACOBIAN NARBEH

6 patents

ADESTO TECHNOLOGIES CORP

3 patents

VIRAGE LOGIC CORP

2 patents

KORDUS II LOUIS CHARLES

1 patent

GILBERT NAD EDWARD

1 patent

ADVANCED MICTRO DEVICES INC

1 patent

Showing the top 50 of 57 patents by PatentIndex Score.