Inventor

MINOR BARRY L

US56 patents

⚠️ This page may combine multiple inventors who share the name “MINOR BARRY L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MINOR BARRY L

IBM

Efficient triangular shaped meshes

Task queue management of virtual devices using a plurality of processors

Balancing computational load across a plurality of processors

Virtual devices using a pluarlity of processors

Balancing computational load across a plurality of processors

Dynamically partitioning processing across plurality of heterogeneous processors

System and method for cache optimized data formatting

Prioritization scheme for enhancing the display of ray traced images

Partitioning processor resources based on memory usage

Memory compression method and apparatus for heterogeneous processor architectures in an information handling system

Partitioning processor resources based on memory usage

Ray tracing with depth buffered display

Portioning and routing of work in a multiple processor system

Hardware utilization of color interpolation capability in a color imaging system

System and method for terrain rendering using a limited memory footprint

Efficient function interpolation using SIMD vector permute functionality

Method and apparatus for processing graphics perspective transformations

Bounding volume for 3D graphic primitives

System and method for cache optimized data formatting

System and method for efficient implementation of software-managed cache

Hiding memory latency

Adaptive span computation during ray casting

Adaptive span computation when ray casting

System and method for blending data sampling techniques

Tightened bounding volumes for BSP-trees

Method and apparatus using primitive bounding volumes to improve the accuracy of BSP-trees

Managing position independent code using a software framework

Three-dimension graphics rendering apparatus and method therefor

System and method for photorealistic imaging workload distribution

System and product for DMA controller with multi-dimensional line-walking functionality

System and method for DMA controller with multi-dimensional line-walking functionality

Ray tracing with depth buffered display

NUTTER MARK RICHARD

System for iterative interactive ray tracing in a multiprocessor environment

System and method for iterative interactive ray tracing in a multiprocessor environment

System and method for a software managed cache in a multiprocessing environment

MADRUGA JOAQUIN

Security screening image analysis simplification through object pattern identification

System and method for photorealistic imaging workload distribution

Security screening image analysis simplification through object pattern identification

BELLOWS GREGORY H

Dynamically distribute a multi-dimensional work set across a multi-core system

Customizing function behavior based on cache and scheduling parameters of a memory argument

Method for managing hardware resources within a simultaneous multi-threaded processing system

BROKENSHIRE DANIEL ALAN

Dynamically partitioning processing across a plurality of heterogeneous processors

Virtual devices using a plurality of processors

BROKENSHIRE DANIEL A

Efficient communication of producer/consumer buffer status

Efficient communication of producer/consumer buffer status

ALEXANDER BENJAMIN G

Reducing queue synchronization of multiple work items in a system with high memory latency between processing nodes

BELLOWS GREGORY HOWARD

Method to dynamically distribute a multi-dimensional work set across a multi-core system

GOWEN MICHAEL STAN

Managing position independent code using a software framework

ALEXANDER BENJAMIN GALE

Reducing cross queue synchronization on systems with low memory latency across distributed processing nodes

BELLOWS GREG H

Method for managing hardware resources within a simultaneous multi-threaded processing system