Inventor
JAIN SAMEER H
US17 patents
⚠️ This page may combine multiple inventors who share the name “JAIN SAMEER H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
15 patentsUS9111962B1Aug 18, 2015
Selective dielectric spacer deposition for exposing sidewalls of a finFET
IBM18 citations92
US9349836B2May 24, 2016
Fin end spacer for preventing merger of raised active regions
IBM6 citations84
US8629510B2Jan 14, 2014
Two-step silicide formation
IBM7 citations84
US8951868B1Feb 10, 2015
Formation of functional gate structures with different critical dimensions using a replacement gate process
IBM19 citations83
US7538339B2May 26, 2009
Scalable strained FET device and method of fabricating the same
IBM7 citations74
US10262996B2Apr 16, 2019
Third type of metal gate stack for CMOS devices
IBM1 citations73
US8647954B2Feb 11, 2014
Two-step silicide formation
IBM4 citations73
US9331166B2May 3, 2016
Selective dielectric spacer deposition for exposing sidewalls of a finFET
IBM2 citations62
US10741554B2Aug 11, 2020
Third type of metal gate stack for CMOS devices
IBM0 citations52
US9679993B2Jun 13, 2017
Fin end spacer for preventing merger of raised active regions
IBM0 citations52
US9634006B2Apr 25, 2017
Third type of metal gate stack for CMOS devices
IBM0 citations52
US9601380B2Mar 21, 2017
Fin end spacer for preventing merger of raised active regions
IBM0 citations52
US9515168B2Dec 6, 2016
Fin end spacer for preventing merger of raised active regions
IBM0 citations52
US9391175B2Jul 12, 2016
Fin end spacer for preventing merger of raised active regions
IBM0 citations52
US9514992B2Dec 6, 2016
Unidirectional spacer in trench silicide
IBM0 citations40