Inventor

SARDESAI VIRAJ Y

US41 patents

⚠️ This page may combine multiple inventors who share the name “SARDESAI VIRAJ Y”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SARDESAI VIRAJ Y

IBM

Variable stoichiometry silicon nitride barrier films for tunable etch selectivity and enhanced hyrogen permeability

Semiconductor wafer edge bead removal method and tool

Contact first replacement metal gate

Selective dielectric spacer deposition for exposing sidewalls of a finFET

Silicide contacts having different shapes on regions of a semiconductor device

Raised trench metal semiconductor alloy formation

Semiconductor wafer edge bead removal method and tool

Titanium polycide stabilization with a porous barrier

Fin end spacer for preventing merger of raised active regions

Local interconnects compatible with replacement gate structures

FinFET device formation

Inducing channel strain via encapsulated silicide formation

Third type of metal gate stack for CMOS devices

Contact first replacement metal gate

Cross-coupling of gate conductor line and active region in semiconductor devices

FinFET device formation

Partial spacer for increasing self aligned contact process margins

Selective dielectric spacer deposition for exposing sidewalls of a finFET

Third type of metal gate stack for CMOS devices

Partial spacer for increasing self aligned contact process margins

Partial spacer for increasing self aligned contact process margins

Fin end spacer for preventing merger of raised active regions

Third type of metal gate stack for CMOS devices

Fin end spacer for preventing merger of raised active regions

Diffusion-controlled oxygen depletion of semiconductor contact interface

Fin end spacer for preventing merger of raised active regions

Diffusion-controlled oxygen depletion of semiconductor contact interface

Fin end spacer for preventing merger of raised active regions

Semiconductor devices with graphene nanoribbons

Electrical fuse with bottom contacts

Conductive spacers for semiconductor devices and methods of forming

Directional chemical oxide etch technique

SARDESAI VIRAJ Y

Cross-coupling of gate conductor line and active region in semiconductor devices

Local interconnects compatible with replacement gate structures

ALPTEKIN EMRE

Multi-stage silicidation process

Method to form uniform silicide by selective implantation

GLOBALFOUNDRIES INC

Semiconductor devices with graphene nanoribbons

ENGEL BRETT H

Converting metal mask to metal-oxide etch stop layer and related semiconductor structure

TOSHIBA KK

Method of depositing a multilayer thin film by means of magnetron sputtering which controls the magnetic field

GLOBAL FOUNDRIES U S 2 LLC

Self-aligned gate contact structure

INFINEON TECHNOLOGIES AG

Method to enhance epitaxial regrowth in amorphous silicon contacts