Inventor

TRAN CUNG D

US21 patents

⚠️ This page may combine multiple inventors who share the name “TRAN CUNG D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TRAN CUNG D

IBM

Selective dielectric spacer deposition for exposing sidewalls of a finFET

Silicide contacts having different shapes on regions of a semiconductor device

Raised trench metal semiconductor alloy formation

Fin end spacer for preventing merger of raised active regions

Inducing channel strain via encapsulated silicide formation

Selective dielectric spacer deposition for exposing sidewalls of a finFET

Fin end spacer for preventing merger of raised active regions

Fin end spacer for preventing merger of raised active regions

Diffusion-controlled oxygen depletion of semiconductor contact interface

Fin end spacer for preventing merger of raised active regions

Diffusion-controlled oxygen depletion of semiconductor contact interface

Fin end spacer for preventing merger of raised active regions

Directional chemical oxide etch technique

Unidirectional spacer in trench silicide

GLOBALFOUNDRIES INC

Contact fill in an integrated circuit

Structure and method to improve overlay performance in semiconductor devices

Structure and method to improve overlay performance in semiconductor devices

ALPTEKIN EMRE

Multi-stage silicidation process

Method to form uniform silicide by selective implantation

UTOMO HENRY K

Planar silicide semiconductor structure

YANG BIN

MOSFET integrated circuit with uniformly thin silicide layer and methods for its manufacture