Inventor
ETZION ORNA
IL9 patents
Patents
9 patentsUS7000226B2Feb 14, 2006
Exception masking in binary translation
INTEL CORP25 citations89
US7249350B2Jul 24, 2007
Optimized translation of scalar type SIMD instructions into non-scalar SIMD instructions
INTEL CORP16 citations83
US7624384B2Nov 24, 2009
Apparatus, system, and method of dynamic binary translation with translation reuse
INTEL CORP20 citations82
US7219335B1May 15, 2007
Method and apparatus for stack emulation during binary translation
INTEL CORP13 citations76
US7219336B2May 15, 2007
Tracking format of registers having multiple content formats in binary translation
INTEL CORP8 citations73
US7363471B2Apr 22, 2008
Apparatus, system, and method of dynamic binary translation supporting a denormal input handling mechanism
INTEL CORP8 citations66
US7380240B2May 27, 2008
Apparatus and methods to avoid floating point control instructions in floating point to integer conversion
INTEL CORP4 citations62
US7493599B2Feb 17, 2009
Device, system and method for detection and handling of misaligned data access
INTEL CORP4 citations56
US7340592B1Mar 4, 2008
Executing a translated block of instructions and branching to correction code when expected top of stack does not match actual top of stack to adjust stack at execution time to continue executing without restarting translating
INTEL CORP0 citations40