Inventor
SINYKIN JOSHUA P
US9 patents
⚠️ This page may combine multiple inventors who share the name “SINYKIN JOSHUA P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SINYKIN JOSHUA P
3 patentsUS8271811B2Sep 18, 2012
Methods and apparatus for load-based power management of PHY logic circuits of a SAS device based upon a current workload
SINYKIN JOSHUA P2 citations59
US8589722B2Nov 19, 2013
Methods and structure for storing errors for error recovery in a hardware controller
SINYKIN JOSHUA P2 citations55
US8521931B2Aug 27, 2013
Serial input output (SIO) port expansion apparatus and method
SINYKIN JOSHUA P1 citations48
LSI CORP
3 patentsUS7493532B2Feb 17, 2009
Methods and structure for optimizing SAS domain link quality and performance
LSI CORP0 citations48
US7636798B2Dec 22, 2009
Methods and systems for integrating unique information in SAS interface components
LSI CORP1 citations44
US7502874B2Mar 10, 2009
Methods and systems for integrating unique information in SAS interface components
LSI CORP0 citations44
SAGHI EUGENE
2 patentsUS8745457B2Jun 3, 2014
Methods and structure for utilizing external interfaces used during normal operation of a circuit to output test signals
SAGHI EUGENE2 citations59
US8775888B2Jul 8, 2014
Methods and structure for correlating multiple test outputs of an integrated circuit acquired during separate instances of an event
SAGHI EUGENE0 citations37