P

Inventor

MEJDRICH ERIC OLIVER

US49 patents
⚠️ This page may combine multiple inventors who share the name “MEJDRICH ERIC OLIVER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

22 patents
US8022950B2Sep 20, 2011

Stochastic culling of rays with increased depth of recursion

IBM134 citations98
US7973804B2Jul 5, 2011

Image processing with highly threaded texture fragment generation

IBM51 citations94
US7809925B2Oct 5, 2010

Processing unit incorporating vectorizable execution unit

IBM52 citations94
US8350846B2Jan 8, 2013

Updating ray traced acceleration data structures between frames based on changing perspective

IBM25 citations92
US7818503B2Oct 19, 2010

Method and apparatus for memory utilization

IBM17 citations92
US7996621B2Aug 9, 2011

Data cache invalidate with data dependent expiration using a step value

IBM8 citations84
US7926009B2Apr 12, 2011

Dual independent and shared resource vector execution units with shared register file

IBM11 citations84
US7890699B2Feb 15, 2011

Processing unit incorporating L1 cache bypass

IBM14 citations84
US7852336B2Dec 14, 2010

Dynamic determination of optimal spatial index mapping to processor thread resources

IBM11 citations84
US7836258B2Nov 16, 2010

Dynamic data cache invalidate with data dependent expiration

IBM8 citations84
US7783860B2Aug 24, 2010

Load misaligned vector with permute and mask insert

IBM17 citations84
US7752413B2Jul 6, 2010

Method and apparatus for communicating between threads

IBM11 citations84
US7681020B2Mar 16, 2010

Context switching and synchronization

IBM10 citations84
US7234017B2Jun 19, 2007

Computer system architecture for a processor connected to a high speed bus transceiver

IBM14 citations81
US7945764B2May 17, 2011

Processing unit incorporating multirate execution unit

IBM5 citations63
US7941644B2May 10, 2011

Simultaneous multi-thread instructions issue to execution units while substitute injecting sequence of instructions for long latency sequencer instruction via multiplexer

IBM5 citations63
US7904700B2Mar 8, 2011

Processing unit incorporating special purpose register for use with instruction-based persistent vector multiplexer control

IBM5 citations63
US7904699B2Mar 8, 2011

Processing unit incorporating instruction-based persistent vector multiplexer control

IBM4 citations63
US7737974B2Jun 15, 2010

Reallocation of spatial index traversal between processing elements in response to changes in ray tracing graphics workload

IBM4 citations63
US7868894B2Jan 11, 2011

Operand multiplexor control modifier instruction in a fine grain multithreaded vector microprocessor

IBM0 citations52
US7757032B2Jul 13, 2010

Computer system bus bridge

IBM0 citations50
US7469312B2Dec 23, 2008

Computer system bus bridge

IBM1 citations50

MEJDRICH ERIC OLIVER

9 patents

BROWN JEFFREY DOUGLAS

7 patents

COMPARAN MIGUEL

4 patents

LUICK DAVID ARNOLD

2 patents

KRIEGEL JON K

1 patent

KUPFERSCHMIDT MARK GARY

1 patent

FOWLER DAVE

1 patent

FOWLER DAVID KEITH

1 patent

HOOVER RUSSELL DEAN

1 patent