Inventor
HAYASHI YUHEI
US25 patents
⚠️ This page may combine multiple inventors who share the name “HAYASHI YUHEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CADENCE DESIGN SYSTEMS INC
16 patentsUS10860763B1Dec 8, 2020
Data routing and multiplexing architecture to support serial links and advanced relocation of emulation models
CADENCE DESIGN SYSTEMS INC10 citations84
US11900135B1Feb 13, 2024
Emulation system supporting representation of four-state signals
CADENCE DESIGN SYSTEMS INC2 citations73
US11275598B1Mar 15, 2022
Dynamic one-bit multiplexing switch for emulation interconnect
CADENCE DESIGN SYSTEMS INC4 citations73
US11243856B1Feb 8, 2022
Framing protocol supporting low-latency serial interface in an emulation system
CADENCE DESIGN SYSTEMS INC2 citations73
US11194942B1Dec 7, 2021
Emulation system supporting four-state for sequential logic circuits
CADENCE DESIGN SYSTEMS INC3 citations73
US10386909B1Aug 20, 2019
Method and system to mitigate large power load steps due to intermittent execution in a computation system
CADENCE DESIGN SYSTEMS INC3 citations73
US10324740B1Jun 18, 2019
Enhanced control system for flexible programmable logic and synchronization
CADENCE DESIGN SYSTEMS INC4 citations73
US9910810B1Mar 6, 2018
Multiphase I/O for processor-based emulation system
CADENCE DESIGN SYSTEMS INC3 citations72
US10990728B1Apr 27, 2021
Functional built-in self-test architecture in an emulation system
CADENCE DESIGN SYSTEMS INC4 citations71
US9721048B1Aug 1, 2017
Multiprocessing subsystem with FIFO/buffer modes for flexible input/output processing in an emulation system
CADENCE DESIGN SYSTEMS INC2 citations65
US11467620B1Oct 11, 2022
Architecture and methodology for tuning clock phases to minimize latency in a serial interface
CADENCE DESIGN SYSTEMS INC1 citations62
US11461522B1Oct 4, 2022
Emulation system supporting computation of four-state combinational functions
CADENCE DESIGN SYSTEMS INC1 citations62
US11106846B1Aug 31, 2021
Systems and methods for emulation data array compaction
CADENCE DESIGN SYSTEMS INC1 citations62
US11048843B1Jun 29, 2021
Dynamic netlist modification of compacted data arrays in an emulation system
CADENCE DESIGN SYSTEMS INC0 citations62
US11449337B1Sep 20, 2022
Pseudorandom keephot instructions to mitigate large load steps during hardware emulation
CADENCE DESIGN SYSTEMS INC0 citations61
US10303230B1May 28, 2019
Method and system to mitigate large power load steps due to intermittent execution in a computation system
CADENCE DESIGN SYSTEMS INC1 citations60
NIPPON TELEGRAPH & TELEPHONE
8 patentsUS12028234B2Jul 2, 2024
Conversion device, conversion method, and conversion program
NIPPON TELEGRAPH & TELEPHONE0 citations53
US11570067B2Jan 31, 2023
Analysis system and analysis method
NIPPON TELEGRAPH & TELEPHONE0 citations51
US12316604B2May 27, 2025
Registration system, registration method, and registration program
NIPPON TELEGRAPH & TELEPHONE0 citations50
US11902310B2Feb 13, 2024
Detection device and detection method
NIPPON TELEGRAPH & TELEPHONE0 citations50
US11863416B2Jan 2, 2024
Imparting device, imparting method, and imparting program
NIPPON TELEGRAPH & TELEPHONE0 citations50
US11824767B2Nov 21, 2023
Communication system and method of verifying continuity
NIPPON TELEGRAPH & TELEPHONE0 citations50
US11729103B2Aug 15, 2023
Estimation method, estimation device, and estimation program
NIPPON TELEGRAPH & TELEPHONE0 citations50
US11570206B2Jan 31, 2023
Control system, control determination device, and control method
NIPPON TELEGRAPH & TELEPHONE0 citations50