P

Inventor

LEE KO-TAO

US31 patents
⚠️ This page may combine multiple inventors who share the name “LEE KO-TAO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

30 patents
US9935175B1Apr 3, 2018

Sidewall spacer for integration of group III nitride with patterned silicon substrate

IBM11 citations84
US9653441B1May 16, 2017

Monolithic integration of a III-V optoelectronic device, a filter and a driving circuit

IBM13 citations84
US9324813B2Apr 26, 2016

Doped zinc oxide as N+ layer for semiconductor devices

IBM5 citations84
US8772116B2Jul 8, 2014

Dielectric equivalent thickness and capacitance scaling for semiconductor devices

IBM11 citations83
US10886328B1Jan 5, 2021

Monolithically integrated GaN light-emitting diode with silicon transistor for displays

IBM7 citations79
US11599785B2Mar 7, 2023

Inference focus for offline training of SRAM inference engine in binary neural network

IBM2 citations73
US11362109B2Jun 14, 2022

Integrated power amplifier

IBM2 citations73
US10991722B2Apr 27, 2021

Ultra low parasitic inductance integrated cascode GaN devices

IBM6 citations73
US10886415B2Jan 5, 2021

Multi-state transistor devices with multiple threshold voltage channels

IBM3 citations73
US10217641B2Feb 26, 2019

Control of current collapse in thin patterned GaN

IBM2 citations71
US11916130B2Feb 27, 2024

Direct growth of lateral III-V bipolar transistor on silicon substrate

IBM0 citations62
US11797851B2Oct 24, 2023

Inference focus for offline training of SRAM inference engine in binary neural network

IBM0 citations62
US11158506B2Oct 26, 2021

Self-aligned, over etched hard mask fabrication method and structure

IBM0 citations62
US10998420B2May 4, 2021

Direct growth of lateral III-V bipolar transistor on silicon substrate

IBM0 citations62
US10940554B2Mar 9, 2021

Planar fabrication of micro-needles

IBM0 citations62
US10943898B2Mar 9, 2021

High switching frequency, low loss and small form factor fully integrated power stage

IBM0 citations62
US10930565B2Feb 23, 2021

III-V CMOS co-integration

IBM0 citations62
US10535650B2Jan 14, 2020

High switching frequency, low loss and small form factor fully integrated power stage

IBM1 citations62
US11484731B2Nov 1, 2022

Cognitive optogenetics probe and analysis

IBM0 citations52
US11056722B2Jul 6, 2021

Tool and method of fabricating a self-aligned solid state thin film battery

IBM0 citations52
US10874876B2Dec 29, 2020

Multiple light sources integrated in a neural probe for multi-wavelength activation

IBM0 citations52
US10833270B1Nov 10, 2020

Lateral electrochemical cell with symmetric response for neuromorphic computing

IBM0 citations52
US10679853B2Jun 9, 2020

Self-aligned, over etched hard mask fabrication method and structure

IBM0 citations52
US10251057B2Apr 2, 2019

Authentication for device connection using visible patterns

IBM0 citations52
US9722033B2Aug 1, 2017

Doped zinc oxide as n+ layer for semiconductor devices

IBM1 citations52
US9087905B2Jul 21, 2015

Transistor formation using cold welding

IBM0 citations52
US8941147B2Jan 27, 2015

Transistor formation using cold welding

IBM0 citations52
US8907381B2Dec 9, 2014

Reduced short channel effect of III-V field effect transistor via oxidizing aluminum-rich underlayer

IBM0 citations52
US8889541B1Nov 18, 2014

Reduced short channel effect of III-V field effect transistor via oxidizing aluminum-rich underlayer

IBM0 citations52
US10720670B2Jul 21, 2020

Self-aligned 3D solid state thin film battery

IBM0 citations42

CHENG CHENG-WEI

1 patent