Inventor

MICOVIC MIROSLAV

US65 patents

⚠️ This page may combine multiple inventors who share the name “MICOVIC MIROSLAV”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MICOVIC MIROSLAV

HRL LAB LLC

Wafer-level die to package and die to die interconnects suspended over integrated heat sinks

Recursive metal embedded chip assembly

Surface mount package for semiconductor devices with embedded heat spreaders

Method of integration of wafer level heat spreaders and backside interconnects on microelectronics wafers

Wafer-level die to package and die to die interconnects suspended over integrated heat sinks

Apparatus for mounting microelectronic chips

Stepped field plate wide bandgap field-effect transistor and method

InP collector InGaAsSb base DHBT device and method of forming same

Fabrication of low resistance, non-alloyed, ohmic contacts to InP using non-stoichiometric InP layers

Integrated structure with transistors and Schottky diodes and process for fabricating the same

High power-low noise microwave GaN heterojunction field effect transistor

High power-low noise microwave GaN heterojunction field effect transistor

GaN DHFET

Self aligned sidewall gate GaN HEMT

Thermal management substrate

High efficiency linear microwave power amplifier

Ohmic contacts for high electron mobility transistors and a method of making the same

Recursive metal embedded chip assembly

Monolithic integration of group III nitride epitaxial layers

Stepped field plate wide bandgap field-effect transistor and method

Integrated RF subsystem

Methods of fabricating self-aligned FETS using multiple sidewall spacers

High performance GaN operational amplifier with wide bandwidth and high dynamic range

Monolithic integration of field-plate and T-gate devices

T-gate field effect transistor with non-linear channel layer and/or gate foot face

Etch-based fabrication process for stepped field-plate wide-bandgap

Apparatus and method for reducing the interface resistance in GaN Heterojunction FETs

Etch-based fabrication process for stepped field-plate wide-bandgap

Simultaneous controlled depth hot embossing and active side protection during packaging and assembly of wide bandgap devices

Method of fabricating slanted field-plate GaN heterojunction field-effect transistor

Integrated structure with transistors and schottky diodes and process for fabricating the same

Fabrication of microfluidic channels in diamond

Monolithic integration of group III nitride epitaxial layers

GaN based active cancellation circuit for high power simultaneous transmit and receive systems

Ohmic metal contact and channel protection in GaN devices using an encapsulation layer

Gate metallization methods for self-aligned sidewall gate GaN HEMT

Monolithic integration of group III nitride epitaxial layers

Monolithic integration of group III nitride epitaxial layers

Simultaneous controlled depth hot embossing and active side protection during packaging and assembly of wide bandgap devices

BROWN DAVID F

Monolithic integration of group III nitride enhancement layers

Group III-N HFET with a graded barrier layer

MICOVIC MIROSLAV

Near junction cooling for GaN devices

Apparatus and method for reducing the interface resistance in GaN heterojunction FETs

MARGOMENOS ALEXANDROS D

Method of mounting electronic chips

HUGHES ELECTRONICS CORP

InPSb channel HEMT on InP for RF application

CORRION ANDREA

Enhancement and depletion mode GaN HMETs on the same substrate

HUSSAIN TAHIR

Enhancement mode normally-off gallium nitride heterostructure field effect transistor

REGAN DEAN C

Gate metallization methods for self-aligned sidewall gate GaN HEMT

HRL LAB INC

Fabrication of low resistance, non-alloyed, OHMIC contacts to INP using non-stoichiometric INP layers

BOEING CO

Systems, methods, and apparatus for a power amplifier module