Inventor

SHIEH HAU-TAI

TW77 patents

⚠️ This page may combine multiple inventors who share the name “SHIEH HAU-TAI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHIEH HAU-TAI

TAIWAN SEMICONDUCTOR MFG CO LTD

Memory device and electronic device

Level shifter

Level shifter

Operation assist circuit, memory device and operation assist method

3D structure for advanced SRAM design to avoid half-selected issue

Three-dimensional static random access memory device structures

3D structure for advanced SRAM design to avoid half-selected issue

Bi-directional parity bit generator circuit

SRAM device capable of working in multiple low voltages without loss of performance

Three-dimensional static random access memory device structures

Latch circuit

Memory circuit, electronic device having the memory circuit, and method of operating memory circuit

Latch circuit formed from bit cell

Semiconductor memory device using shared data line for read/write operation

Bit line pre-charge circuit and method

Memory device and method for reducing active power consumption thereof using address control

Memory device sense amplifier control

Arrangements of memory devices and methods of operating the memory devices

Reducing internal node loading in combination circuits

Sub-word line driver placement for memory device

Sub-word line driver placement for memory device

Reducing internal node loading in combination circuits

Arrangements of memory devices and methods of operating the memory devices

Sub-word line driver placement for memory device

Reducing internal node loading in combination circuits

Level shifter

Sub-word line driver placement for memory device

Latch type sense amplifier for testing

Latch circuit formed by modified memory cells

Latch type sense amplifier

Memory circuit and method of operating the same

Power mode wake-up for memory on different power domains

FinFET semiconductor device grouping

Latch type sense amplifier

Power mode wake-up for memory on different power domains

Memory circuit and method of operating the same

FinFET semiconductor device grouping

Memory circuit and method of operating the same

Power mode wake-up for memory on different power domains

Three-dimensional static random access memory device structures

Semiconductor memory device using shared data line for read/write operation

Bit line pre-charge circuit and method

Word line pulse width control circuit in static random access memory

TAIWAN SEMICONDUCTOR MFG

3D structure for advanced SRAM design to avoid half-selected issue

SRAM multiplexing apparatus

Efficient refresh operation for semiconductor memory devices

Data-aware SRAM systems and methods forming same

Low power word line control circuits with boosted voltage output for semiconductor memory

CHEN YI-TZU

Split bit line architecture circuits and methods for memory devices

SHIEH HAU-TAI

MIM decoupling capacitors under a contact pad