Inventor

HUMMEL MARK D

US44 patents

⚠️ This page may combine multiple inventors who share the name “HUMMEL MARK D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HUMMEL MARK D

ADVANCED MICRO DEVICES INC

Computer system implementing a system and method for tracking the progress of posted write transactions

System including a host connected to a plurality of memory modules via a serial memory interconnect

System and method of increasing bandwidth for issuing ordered transactions into a distributed communication system

System for reconfiguring a first device and/or a second device to use a maximum compatible communication parameters based on transmitting a communication to the first and second devices of a point-to-point link

I/O memory management unit including multilevel address translation for I/O and computation offload

Using an IOMMU to create memory archetypes

Implementing locks in a distributed processing system

Chained hybrid input/output memory management unit

System and method of initializing and determining a bootstrap processor [BSP] in a fabric of a distributed multiprocessor computing system

Interrupt virtualization

Efficiently controlling special memory mapped system accesses

Controlling an I/O MMU

Avoiding silent data corruption and data leakage in a virtual environment with multiple guests

Input/output memory management unit that implements memory attributes based on translation data

Ensuring deadlock free operation for peer to peer traffic in an input/output memory management unit (IOMMU)

GLOBALFOUNDRIES INC

Filtering and remapping interrupts

Direct memory access (DMA) address translation in an input/output memory management unit (IOMMU)

Virtualizing an IOMMU

Virtualizing an IOMMU

Address translation for input/output (I/O) devices and interrupt remapping for I/O devices in an I/O memory management unit (IOMMU)

Translation data prefetch in an IOMMU

Synchronization device and methods thereof

KEGEL ANDREW G

Virtual input/output memory management unit within a guest virtual machine

IOMMU using two-level address translation for I/O and computation offload devices on a peripheral interconnect

All invalidate approach for memory management units

Method and apparatus for controlling system interrupts

DATA GENERAL CORP

Contention revolution in a digital computer system

Digital data processing system having dual-purpose scratchpad and address translation memory

Microcode control apparatus

API NETWORKS INC

Low voltage differential receiver/transmitter and calibration method thereof

System and method of maintaining coherency in a distributed communication system

SEREBRIN BENJAMIN C

Interrupt virtualization

Guest interrupt manager that records interrupts for guests and delivers interrupts to executing guests

OSBORN MICHAEL J

Channel rotating error correction code

Channel rotating error correction code

ALPHA PROCESSOR INC

System and method for implementing a separate virtual channel for posted requests in a multiprocessor computer system

ALLIANCE SEMICONDUCTOR CORP

Low latency synchronization of asynchronous data

(unassigned)

System and method of allocating bandwidth to a plurality of devices interconnected by a plurality of point-to-point communication links

GASTER BENEDICT R

Vector width-aware synchronization-elision for vector processors

BRETERNITZ JR MAURICIO

Processing system using virtual network interface controller addressing as flow control metadata

HUMMEL MARK D

Mechanism to handle peripheral page faults

MAYHEW DAVID E

Devices and methods for interconnecting server nodes

ASARO ANTHONY

Shared memory space in a unified memory model

NVIDIA CORP

Crossbar multipathing for multicast performance in tiled switches