Inventor

HARTONO ALBERT

US17 patents

⚠️ This page may combine multiple inventors who share the name “HARTONO ALBERT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HARTONO ALBERT

INTEL CORP

Loop vectorization methods and apparatus

Loop vectorization methods and apparatus

Methods and systems to vectorize scalar computer program loops having loop-carried dependences

Instruction to reduce elements in a vector register with strided access pattern

Methods and systems to vectorize scalar computer program loops having loop-carried dependences

Methods and systems to vectorize scalar computer program loops having loop-carried dependences

Lightweight restricted transactional memory for speculative compiler optimization

Method and apparatus for speculative vectorization

Fast approximate conflict detection

Systems, apparatuses, and methods for setting an output mask in a destination writemask register from a source write mask register using an input writemask and immediate

Method and apparatus for approximating detection of overlaps between memory ranges

Automatic loop vectorization using hardware transactional memory

BHARADWAJ JAYASHANKAR

Apparatus and method for propagating conditionally evaluated values in SIMD/vector execution using an input mask register

Speculative non-faulting loads and gathers

Apparatus and method for vectorization with speculation support

LEE VICTOR W

Systems, apparatuses, and methods for setting an output mask in a destination writemask register from a source write mask register using an input writemask and immediate

VASUDEVAN NALINI

Instruction and logic for cache-based speculative vectorization