Inventor

AGARWALA MANISHA

US64 patents

⚠️ This page may combine multiple inventors who share the name “AGARWALA MANISHA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

AGARWALA MANISHA

TEXAS INSTRUMENTS INC

Application specific exclusive of based logic module architecture for FPGAs

Progressive extended compression mask for dynamic trace

Apparatus and method for trace stream identification of a processor reset

Maintaining coherent synchronization between data streams on detection of overflow

Recovery from corruption using event offset format in data trace

Tracing through reset

Tracing program counter addresses using native program counter format and instruction count format

Field programmable gate array logic module configurable as combinational or sequential circuits

Embedding event information in the timing stream

Method and system of indexing into trace data based on entries in a log buffer

Method and system of identifying overlays used by a program

Embedding event information in the timing stream

Behavior of trace in non-emulatable code

Method for generating timing data packet

Method for guaranteeing timing precision for randomly arriving asynchronous events

Systems and methods for secure debugging and profiling of a computer system

Method of translating system events into signals for activity monitoring

Apparatus and method for trace stream identification of a processor debug halt signal

Little offset in multicycle event maintaining cycle accurate tracing of stop events

Emulation pause and reset tracing of multiple sync points pointing to different addresses

Programmable extended compression mask for dynamic trace

Tracing through reset

Real-time monitoring, alignment, and translation of CPU stalls or events

Progressive extended compression mask for dynamic trace

Distinguishing between two classes of trace information

Stalling CPU pipeline to prevent corruption in trace while maintaining coherency with asynchronous events

Emulation pause and reset tracing of multiple sync points pointing to different addresses

Reporting a saturated counter value

Tracing program counter addresses using native program counter format and instruction count format

Dynamic data trace output scheme

Maintaining coherent synchronization between data streams on detection of overflow

Efficient protocol for encoding software pipelined loop when PC trace is enabled

Saving resources by deducing the total prediction events

Merging branch information with sync points

Method and system of identifying overlays

Distinguishing between two classes of trace information

Progressive extended compression mask for dynamic trace

Stalling CPU pipeline to prevent corruption in trace while maintaining coherency with asynchronous events

Read FIFO scheduling for multiple streams while maintaining coherency

Tracing through reset

Programmable extended compression mask for dynamic trace

Read FIFO scheduling for multiple streams while maintaining coherency

Multi-port trace data handling

Recovery from corruption using event offset format in data trace

Apparatus and method for trace stream identification of a pipeline flattener primary code flush following initiation of an interrupt service routine

Adder-based base cell for field programmable gate arrays

TEXAS INTRUMENTS INC

Navigating trace data

SOHM OLIVER P

Stored program writing stall information when a processor stalls waiting for another processor

TEXAS INSTRUMENTS DEUTSCHLAND

Efficient trace triggering

AGARWALA MANISHA

Trigger ordering for trace streams when multiple triggers accumulate