Inventor
LEENSTRA JENTJE
DE40 patents
Patents
40 patentsUS9760375B2Sep 12, 2017
Register files for storing data operated on by instructions of multiple widths
IBM23 citations94
US9740486B2Aug 22, 2017
Register files for storing data operated on by instructions of multiple widths
IBM23 citations94
US9720696B2Aug 1, 2017
Independent mapping of threads
IBM30 citations94
US9690585B2Jun 27, 2017
Parallel slice processor with dynamic instruction stream mapping
IBM22 citations94
US9690586B2Jun 27, 2017
Processing of multiple instruction streams in a parallel slice processor
IBM26 citations94
US9672043B2Jun 6, 2017
Processing of multiple instruction streams in a parallel slice processor
IBM29 citations94
US9665372B2May 30, 2017
Parallel slice processor with dynamic instruction stream mapping
IBM25 citations94
US10387686B2Aug 20, 2019
Hardware based isolation for secure execution of virtual machines
IBM11 citations84
US9977678B2May 22, 2018
Reconfigurable parallel execution and load-store slice processor
IBM7 citations84
US9971602B2May 15, 2018
Reconfigurable processing method with modes controlling the partitioning of clusters and cache slices
IBM6 citations84
US9870229B2Jan 16, 2018
Independent mapping of threads
IBM8 citations84
US10983800B2Apr 20, 2021
Reconfigurable processor with load-store slices supporting reorder and controlling access to cache slices
IBM2 citations73
US10831889B2Nov 10, 2020
Secure memory implementation for secure execution of virtual machines
IBM1 citations73
US10474816B2Nov 12, 2019
Secure memory implementation for secure execution of Virtual Machines
IBM2 citations73
US10423412B2Sep 24, 2019
Instructions to count contiguous register elements having a specific value in a selected location
IBM2 citations73
US10409598B2Sep 10, 2019
Handling unaligned load operations in a multi-slice computer processor
IBM1 citations73
US10387150B2Aug 20, 2019
Instructions to count contiguous register elements having a specific value in a selected location
IBM2 citations73
US10296741B2May 21, 2019
Secure memory implementation for secure execution of virtual machines
IBM4 citations73
US10157064B2Dec 18, 2018
Processing of multiple instruction streams in a parallel slice processor
IBM2 citations73
US10083039B2Sep 25, 2018
Reconfigurable processor with load-store slices supporting reorder and controlling access to cache slices
IBM3 citations73
US10073697B2Sep 11, 2018
Handling unaligned load operations in a multi-slice computer processor
IBM2 citations73
US11646861B2May 9, 2023
Low-latency, high-availability and high-speed SerDes interface having multiple synchronization modes
IBM2 citations69
US10067763B2Sep 4, 2018
Handling unaligned load operations in a multi-slice computer processor
IBM1 citations63
US11995445B2May 28, 2024
Assignment of microprocessor register tags at issue time
IBM0 citations62
US11972260B2Apr 30, 2024
Instructions to count a number of contiguous register elements having specific values in a selected location
IBM0 citations62
US11972259B2Apr 30, 2024
Instructions to count a number of contiguous register elements having specific values in a selected location
IBM0 citations62
US11500642B2Nov 15, 2022
Assignment of microprocessor register tags at issue time
IBM0 citations62
US11144323B2Oct 12, 2021
Independent mapping of threads
IBM0 citations62
US10884742B2Jan 5, 2021
Handling unaligned load operations in a multi-slice computer processor
IBM0 citations62
US11068607B2Jul 20, 2021
Protecting cognitive code and client data in a public cloud via deployment of data and executables into a secure partition with persistent data
IBM0 citations61
US10740104B2Aug 11, 2020
Tagging target branch predictors with context with index modification and late stop fetch on tag mismatch
IBM1 citations61
US11907074B2Feb 20, 2024
Low-latency deserializer having fine granularity and defective-lane compensation
IBM0 citations60
US12061910B2Aug 13, 2024
Dispatching multiply and accumulate operations based on accumulator register index number
IBM0 citations52
US10545762B2Jan 28, 2020
Independent mapping of threads
IBM0 citations52
US10496406B2Dec 3, 2019
Handling unaligned load operations in a multi-slice computer processor
IBM0 citations52
US11461474B2Oct 4, 2022
Process-based virtualization system for executing a secure application process
IBM0 citations51
US10685106B2Jun 16, 2020
Protecting cognitive code and client data in a public cloud via deployment of data and executables into a stateless secure partition
IBM0 citations51
US10223196B2Mar 5, 2019
ECC scrubbing method in a multi-slice microprocessor
IBM0 citations51
US9846614B1Dec 19, 2017
ECC scrubbing in a multi-slice microprocessor
IBM0 citations51
US10831481B2Nov 10, 2020
Handling unaligned load operations in a multi-slice computer processor
IBM0 citations50