Inventor

ZIAKAS DIMITRIOS

US26 patents

⚠️ This page may combine multiple inventors who share the name “ZIAKAS DIMITRIOS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ZIAKAS DIMITRIOS

INTEL CORP

Technologies for providing remote access to a shared memory pool

Technologies for efficiently managing allocation of memory in a shared memory pool

Techniques to support multiple interconnect protocols for a common set of interconnect connectors

Technologies for managing errors in a remotely accessible memory pool

CPU package substrates with removable memory mechanical interfaces

Apparatus and method for implementing a multi-level memory hierarchy

Semiconductor package with programmable signal routing

Apparatus and method for implementing a multi-level memory hierarchy

Techniques to support multiple interconnect protocols for a common set of interconnect connectors

Translation cache and configurable ECC memory for reducing ECC memory overhead

On-package die-to-die (D2D) interconnect for memory using universal chiplet interconnect express (UCIe) PHY

Stacked memory chip solution with reduced package inputs/outputs (I/Os)

System, apparatus and methods for power communications according to a CXL power protocol

Accessing memory coupled to a target node from an initiator node

Controlling access to storage in a computing device

Architectural enhancements for computing systems having artificial intelligence logic disposed locally to memory

Rework grid array interposer with direct power

Failover for pooled memory

Method and apparatus for server platform architectures that enable serviceable nonvolatile memory modules

RAMANUJAN RAJ K

Apparatus and method for implementing a multi-level memory hierarchy over common memory channels

Apparatus and method for implementing a multi-level memory hierarchy

NACHIMUTHU MURUGASAMY K

Autonomous initialization of non-volatile random access memory in a computer system

Memory module architecture

ZIAKAS DIMITRIOS

Mechanism for facilitating customization of multipurpose interconnect agents at computing devices

Home agent multi-level NVM memory architecture

SWANSON ROBERT C

Initialization trace of a computing device