Inventor
ZHAO CHONG J
US10 patents
⚠️ This page may combine multiple inventors who share the name “ZHAO CHONG J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
7 patentsUS10146711B2Dec 4, 2018
Techniques to access or operate a dual in-line memory module via multiple data channels
INTEL CORP14 citations84
US9832876B2Nov 28, 2017
CPU package substrates with removable memory mechanical interfaces
INTEL CORP7 citations83
US11056179B2Jul 6, 2021
Techniques to couple high bandwidth memory device on silicon substrate and package substrate
INTEL CORP1 citations73
US10884958B2Jan 5, 2021
DIMM for a high bandwidth memory channel
INTEL CORP2 citations73
US10592445B2Mar 17, 2020
Techniques to access or operate a dual in-line memory module via multiple data channels
INTEL CORP2 citations73
US12340863B2Jun 24, 2025
Stacked memory chip solution with reduced package inputs/outputs (I/Os)
INTEL CORP0 citations62
US12073906B2Aug 27, 2024
Package pin pattern for device-to-device connection
INTEL CORP0 citations56
TAHOE RES LTD
3 patentsUS11776619B2Oct 3, 2023
Techniques to couple high bandwidth memory device on silicon substrate and package substrate
TAHOE RES LTD1 citations73
US12087352B2Sep 10, 2024
Techniques to couple high bandwidth memory device on silicon substrate and package substrate
TAHOE RES LTD0 citations62
US11557333B2Jan 17, 2023
Techniques to couple high bandwidth memory device on silicon substrate and package substrate
TAHOE RES LTD0 citations62