Inventor
GANESAN SANKA
US60 patents
⚠️ This page may combine multiple inventors who share the name “GANESAN SANKA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
42 patentsUS9660364B2May 23, 2017
System interconnect for integrated circuits
INTEL CORP70 citations95
US7705447B2Apr 27, 2010
Input/output package architectures, and methods of using same
INTEL CORP19 citations92
US10658279B2May 19, 2020
High density package interconnects
INTEL CORP6 citations84
US11430724B2Aug 30, 2022
Ultra-thin, hyper-density semiconductor packages
INTEL CORP5 citations83
US11302643B2Apr 12, 2022
Microelectronic component having molded regions with through-mold vias
INTEL CORP5 citations83
US9832876B2Nov 28, 2017
CPU package substrates with removable memory mechanical interfaces
INTEL CORP7 citations83
US9265170B2Feb 16, 2016
Integrated circuit connectors
INTEL CORP13 citations83
US7888784B2Feb 15, 2011
Substrate package with through holes for high speed I/O flex cable
INTEL CORP11 citations82
US11581287B2Feb 14, 2023
Chip scale thin 3D die stacked package
INTEL CORP2 citations73
US11410919B2Aug 9, 2022
Stacked silicon die architecture with mixed flipcip and wirebond interconnect
INTEL CORP3 citations73
US11276630B2Mar 15, 2022
Planar integrated circuit package interconnects
INTEL CORP2 citations73
US10658765B2May 19, 2020
Edge-firing antenna walls built into substrate
INTEL CORP2 citations73
US10651116B2May 12, 2020
Planar integrated circuit package interconnects
INTEL CORP3 citations73
US10204851B2Feb 12, 2019
High density package interconnects
INTEL CORP1 citations73
US9922916B2Mar 20, 2018
High density package interconnects
INTEL CORP3 citations73
US9564412B2Feb 7, 2017
Shaped and oriented solder joints
INTEL CORP2 citations73
US12176292B2Dec 24, 2024
Microelectronic component having molded regions with through-mold vias
INTEL CORP2 citations72
US12170273B2Dec 17, 2024
Integrated circuit assemblies with direct chip attach to circuit boards
INTEL CORP2 citations72
US11817390B2Nov 14, 2023
Microelectronic component having molded regions with through-mold vias
INTEL CORP2 citations72
US11694959B2Jul 4, 2023
Multi-die ultrafine pitch patch architecture and method of making
INTEL CORP3 citations72
US11387175B2Jul 12, 2022
Interposer package-on-package (PoP) with solder array thermal contacts
INTEL CORP6 citations72
US10784204B2Sep 22, 2020
Rlink—die to die channel interconnect configurations to improve signaling
INTEL CORP3 citations72
US11107757B2Aug 31, 2021
Integrated circuit structures in package substrates
INTEL CORP2 citations71
US10672693B2Jun 2, 2020
Integrated circuit structures in package substrates
INTEL CORP2 citations71
US11869842B2Jan 9, 2024
Scalable high speed high bandwidth IO signaling package architecture and method of making
INTEL CORP2 citations70
US11574851B2Feb 7, 2023
Coupled cooling fins in ultra-small systems
INTEL CORP3 citations70
US10580758B2Mar 3, 2020
Scalable package architecture and associated techniques and configurations
INTEL CORP1 citations70
US12387999B2Aug 12, 2025
Planar integrated circuit package interconnects
INTEL CORP0 citations63
US12476174B2Nov 18, 2025
Ultra-thin, hyper-density semiconductor packages
INTEL CORP0 citations62
US12406914B2Sep 2, 2025
Ultra-thin, hyper-density semiconductor packages
INTEL CORP0 citations62
US12368089B2Jul 22, 2025
Low cost embedded integrated circuit dies
INTEL CORP0 citations62
US12347782B2Jul 1, 2025
Microelectronic assemblies with direct attach to circuit boards
INTEL CORP1 citations62
US12334242B2Jun 17, 2025
Coreless electronic substrates having embedded inductors
INTEL CORP0 citations61
US12142568B2Nov 12, 2024
Multi-die ultrafine pitch patch architecture of interconnect bridge over glass layer and method of making
INTEL CORP0 citations61
US11640942B2May 2, 2023
Microelectronic component having molded regions with through-mold vias
INTEL CORP0 citations61
US11804426B2Oct 31, 2023
Integrated circuit structures in package substrates
INTEL CORP0 citations60
US11545407B2Jan 3, 2023
Thermal management solutions for integrated circuit packages
INTEL CORP0 citations60
US9793244B2Oct 17, 2017
Scalable package architecture and associated techniques and configurations
INTEL CORP1 citations60
US11552035B2Jan 10, 2023
Electronic package with stud bump electrical connections
INTEL CORP0 citations59
US11127706B2Sep 21, 2021
Electronic package with stud bump electrical connections
INTEL CORP1 citations59
US12557675B2Feb 17, 2026
Inorganic redistribution layer on organic substrate in integrated circuit packages
INTEL CORP0 citations57
US8353101B2Jan 15, 2013
Method of making substrate package with through holes for high speed I/O flex cable
INTEL CORP3 citations57
GANESAN SANKA
7 patentsUS8188594B2May 29, 2012
Input/output package architectures
GANESAN SANKA59 citations96
US10170409B2Jan 1, 2019
Package on package architecture and method for making
GANESAN SANKA22 citations93
US8513792B2Aug 20, 2013
Package-on-package interconnect stiffener
GANESAN SANKA20 citations92
US9368437B2Jun 14, 2016
High density package interconnects
GANESAN SANKA6 citations83
US8508947B2Aug 13, 2013
Flex cable and method for making the same
GANESAN SANKA11 citations83
US10903166B2Jan 26, 2021
Integrated circuit packages
GANESAN SANKA5 citations73
US9324678B2Apr 26, 2016
Low profile zero/low insertion force package top side flex cable connector architecture
GANESAN SANKA4 citations73
ALEKSOV ALEKSANDAR
1 patentShowing the top 50 of 60 patents by PatentIndex Score.