Inventor
THOMAS SHAWN GEORGE
US29 patents
⚠️ This page may combine multiple inventors who share the name “THOMAS SHAWN GEORGE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
GLOBALWAFERS CO LTD
19 patentsUS11345996B2May 31, 2022
Liner assemblies for substrate processing systems
GLOBALWAFERS CO LTD5 citations83
US10907251B2Feb 2, 2021
Liner assemblies for substrate processing systems
GLOBALWAFERS CO LTD5 citations83
US11081386B2Aug 3, 2021
High resistivity SOI wafers and a method of manufacturing thereof
GLOBALWAFERS CO LTD2 citations73
US10910257B2Feb 2, 2021
High resistivity SOI wafers and a method of manufacturing thereof
GLOBALWAFERS CO LTD2 citations73
US11668006B2Jun 6, 2023
Liner assemblies for substrate processing systems
GLOBALWAFERS CO LTD2 citations72
US12071686B2Aug 27, 2024
Liner assemblies for substrate processing systems
GLOBALWAFERS CO LTD0 citations62
US11699615B2Jul 11, 2023
High resistivity semiconductor-on-insulator wafer and a method of manufacture
GLOBALWAFERS CO LTD0 citations62
US11598021B2Mar 7, 2023
CVD apparatus
GLOBALWAFERS CO LTD1 citations62
US11594446B2Feb 28, 2023
High resistivity SOI wafers and a method of manufacturing thereof
GLOBALWAFERS CO LTD0 citations62
US11239107B2Feb 1, 2022
High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
GLOBALWAFERS CO LTD0 citations62
US11139198B2Oct 5, 2021
High resistivity semiconductor-on-insulator wafer and a method of manufacturing
GLOBALWAFERS CO LTD0 citations62
US11798835B2Oct 24, 2023
Methods for preparing a SOI structure
GLOBALWAFERS CO LTD1 citations59
US11282739B2Mar 22, 2022
Methods for removing an oxide film from a SOI structure and methods for preparing a SOI structure
GLOBALWAFERS CO LTD1 citations59
US10832937B1Nov 10, 2020
High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
GLOBALWAFERS CO LTD0 citations52
US10784146B2Sep 22, 2020
Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
GLOBALWAFERS CO LTD0 citations52
US10741437B2Aug 11, 2020
High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
GLOBALWAFERS CO LTD0 citations52
US10658227B2May 19, 2020
Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
GLOBALWAFERS CO LTD0 citations52
US10510583B2Dec 17, 2019
Method of manufacturing silicon germanium-on-insulator
GLOBALWAFERS CO LTD0 citations52
US10458709B2Oct 29, 2019
Semiconductor wafer support ring for heat treatment
GLOBALWAFERS CO LTD0 citations50
SUNEDISON SEMICONDUCTOR LTD UEN201334164H
5 patentsUS10283402B2May 7, 2019
Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
SUNEDISON SEMICONDUCTOR LTD UEN201334164H6 citations84
US10546771B2Jan 28, 2020
High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
SUNEDISON SEMICONDUCTOR LTD UEN201334164H1 citations73
US10483152B2Nov 19, 2019
High resistivity semiconductor-on-insulator wafer and a method of manufacturing
SUNEDISON SEMICONDUCTOR LTD UEN201334164H1 citations72
US10145011B2Dec 4, 2018
Substrate processing systems having multiple gas flow controllers
SUNEDISON SEMICONDUCTOR LTD UEN201334164H3 citations72
US10072892B2Sep 11, 2018
Semiconductor wafer support ring for heat treatment
SUNEDISON SEMICONDUCTOR LTD UEN201334164H5 citations71