Inventor

PARRY JONATHAN SCOTT

US38 patents

⚠️ This page may combine multiple inventors who share the name “PARRY JONATHAN SCOTT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PARRY JONATHAN SCOTT

MICRON TECHNOLOGY INC

Methods and system with dynamic ECC voltage and frequency

Real-time trigger to dump an error log

Storage device deep idle power mode

Peak power management in a memory device

Host assisted operations in managed memory devices

Automated power down based on state of firmware

Host-based flash memory maintenance techniques

Logical-to-physical map synchronization in a memory device

Shared parity protection

Non-volatile memory module architecture to support memory error correction

Sequential data optimized sub-regions in storage devices

Non-volatile memory module architecture to support memory error correction

Dynamic memory address write policy translation based on performance needs

System using a restricted operation mode memory indicator

Peak power management in a memory device

Automated power down based on state of firmware

Real-time trigger to dump an error log

Host-based flash memory maintenance techniques

Sequential data optimized sub-regions in storage devices

Methods and system with dynamic ECC voltage and frequency

Increased efficiency obfuscated logical-to-physical map management

Dynamic memory address write policy translation based on performance needs

Shared parity protection

Methods to limit power during stress test and other limited supplies environment

System using a restricted operation mode memory indicator

Storage system deep idle power mode

Multi-layer code rate architecture for special event protection with reduced performance penalty

Managing reduced power memory operations

Secure key update for replay protected memory blocks

LODESTAR LICENSING GROUP LLC

Host assisted operations in managed memory devices

Non-volatile memory module architecture to support memory error correction

Sequential data optimized sub-regions in storage devices

Increased efficiency obfuscated logical-to-physical map management

Methods and system with dynamic ECC voltage and frequency

Host assisted operations in managed memory devices

Logical-to-physical map synchronization in a memory device

Non-volatile memory module architecture to support memory error correction

Increased efficiency obfuscated logical-to-physical map management