Inventor

PREISLER EDWARD

US36 patents

⚠️ This page may combine multiple inventors who share the name “PREISLER EDWARD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PREISLER EDWARD

NEWPORT FAB LLC

Low-cost complementary BiCMOS integration scheme

Nickel silicide in bipolar complementary-metal-oxide-semiconductor (BiCMOS) device and method of manufacturing

Silicon-on-insulator (SOI) die including a light emitting layer pedestal-aligned with a light receiving segment

Efficient integration of a first substrate without solder bumps with a second substrate having solder bumps

Method for forming a semiconductor structure having a porous semiconductor layer in RF devices

Group III-V device on group IV substrate using contacts with precursor stacks

Method for manufacturing a semiconductor structure having group III-V device on group IV substrate and contacts with liner stacks

Structure and method for process control monitoring for group III-V devices integrated with group IV substrate

Semiconductor structure having group III-V device on group IV substrate and contacts with precursor stacks

Semiconductor structure having group III-V device on group IV substrate and contacts with liner stacks

Fabrication of semiconductor structure having group III-V device on group IV substrate with separately formed contacts using different metal liners

Semiconductor structure having porous semiconductor segment for RF devices and bulk semiconductor region for non-RF devices

Semiconductor structure having porous semiconductor layer for RF devices

BiCMOS integration using a shared SiGe layer

BiCMOS integration with reduced masking steps

Nickel silicide in bipolar complementary-metal-oxide-semiconductor (BiCMOS) device

Method of manufacturing bipolar complementary-metal-oxide-semiconductor (BiCMOS) devices using nickel silicide

Method of manufacturing nickel silicide in bipolar complementary-metal-oxide-semiconductor (BiCMOS)

Anode up—cathode down silicon and germanium photodiode

Method for fabrication of germanium photodiode with silicon cap

Germanium photodiode with silicon cap

Semiconductor fabrication utilizing grating and trim masks

Integration of optoelectronic devices comprising lithium niobate or other Pockels materials

Semiconductor structure having group III-V device on group IV substrate

Semiconductor structure having group III-V chiplet on group IV substrate and cavity in proximity to heating element

Stress-reduced silicon photonics semiconductor wafer

Integrated optical/electrical probe card for testing optical, electrical, and optoelectronic devices in a semiconductor die

Structure and method for mitigating substrate parasitics in bulk high resistivity substrate technology

Isolated through silicon via and isolated deep silicon via having total or partial isolation

Method for integrating high voltage and high speed bipolar transistors on a substrate and related structure

Efficient fabrication of BiCMOS devices

Heterojunction bipolar transistor having a germanium raised extrinsic base

Heterojunction bipolar transistor having a germanium extrinsic base utilizing a sacrificial emitter post

NEWPORT FAB LLC DBA JAZZ SEMICONDUCTOR

Isolated through silicon vias in RF technologies

UNIV CALIFORNIA

Ultra-broadband transimpedance amplifiers (tia) for optical fiber communications

TRIEYE LTD

Germanium on insulator for CMOS imagers in the short wave infrared