Inventor
TERMAN LEWIS M
US12 patents
Patents
12 patentsUS5336629AAug 9, 1994
Folder Bitline DRAM having access transistors stacked above trench storage capacitors, each such transistor employing a planar semiconductor body which spans adjacent capacitors
IBM45 citations96
US5214603AMay 25, 1993
Folded bitline, ultra-high density dynamic random access memory having access transistors stacked above trench storage capacitors
IBM104 citations96
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Dynamic ram cell with MOS trench capacitor in CMOS
IBM82 citations96
US5339274AAug 16, 1994
Variable bitline precharge voltage sensing technique for DRAM structures
IBM37 citations92
US5280452AJan 18, 1994
Power saving semsing circuits for dynamic random access memory
IBM25 citations92
US4763180AAug 9, 1988
Method and structure for a high density VMOS dynamic ram array
IBM27 citations92
US4306300ADec 15, 1981
Multi-level charge-coupled device memory system including analog-to-digital and trigger comparator circuits
IBM42 citations89
US4618784AOct 21, 1986
High-performance, high-density CMOS decoder/driver circuit
IBM21 citations82
US4326192AApr 20, 1982
Sequential successive approximation analog-to-digital converter
IBM24 citations80
US5148059ASep 15, 1992
CMOS and ECL logic circuit requiring no interface circuitry
IBM13 citations73
US4638462AJan 20, 1987
Self-timed precharge circuit
IBM19 citations73
US4137464AJan 30, 1979
Charge-transfer binary search generating circuit
IBM15 citations73