P

Inventor

SUGIURA SOUICHI

JP12 patents

Patents

12 patents
US5963838AOct 5, 1999

Method of manufacturing a semiconductor device having wiring layers within the substrate

TOSHIBA KK21 citations92
US5841175ANov 24, 1998

Semiconductor device in which an increase in threshold voltage, resulting from back-gate bias effect is mitigated, and method of manufacturing the same

TOSHIBA KK19 citations92
US5666002ASep 9, 1997

Semiconductor device with wiring layer in tunnel in semiconductor substrate

TOSHIBA KK20 citations92
US5545926AAug 13, 1996

Integrated mosfet device with low resistance peripheral diffusion region contacts and low PN-junction failure memory diffusion contacts

TOSHIBA KK16 citations82
US6326691B1Dec 4, 2001

Semiconductor device and method for manufacturing the same

TOSHIBA KK5 citations73
US6320260B1Nov 20, 2001

Semiconductor device and method for manufacturing the same

TOSHIBA KK5 citations73
US5905292AMay 18, 1999

Semiconductor device in which an increase in threshold voltage, resulting from back-gate bias effect is mitigated, and method of manufacturing the same

TOSHIBA KK6 citations73
US5719072AFeb 17, 1998

Method of manufacturing a semiconductor using multi-layer antireflective layer

TOSHIBA KK12 citations73
US5674763AOct 7, 1997

Method of manufacturing a semiconductor device

TOSHIBA KK7 citations73
US5486719AJan 23, 1996

Semiconductor device including insulating film arrangement having low reflectance

TOSHIBA KK11 citations73
US4980733ADec 25, 1990

Semiconductor storage device

TOSHIBA KK5 citations62
US5160988ANov 3, 1992

Semiconductor device with composite surface insulator

TOSHIBA KK4 citations61