Inventor

RUST ROBERT A

US37 patents

⚠️ This page may combine multiple inventors who share the name “RUST ROBERT A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RUST ROBERT A

HEWLETT PACKARD DEVELOPMENT CO

Methods and arrangements for improved stripe-based processing

Methods and apparatus for reducing the opportunity for accidental removal or insertion of components

Methods and systems of using result buffers in parity operations

System and methods for fault path testing through automated error injection

Data display system and method for an object traversing a circuit

Memory manager for a common memory

Methods and apparatus for reducing the opportunity for accidental removal or insertion of components

Methods and systems of using result buffers in parity operations

Redundant data storage systems and methods of operating a redundant data storage system

Fault tolerant data storage systems and methods of operating a fault tolerant data storage system

Methods and systems for fault location

Method and apparatus to concurrently operate on multiple data movement transactions in a disk array subsystem

Hardware assisted communication between processors

Using task description blocks to maintain information regarding operations

Methods and apparatus for verifying the installation of components in a system

Identifier module integrity

Hardware assisted communication between processors

Memory manager for a common memory

Data storage systems and methods

Controller communications over an always-on controller interconnect

HEWLETT PACKARD CO

Compression algorithm with embedded meta-data for partial record operation augmented with expansion joints

Storage management system and auto-RAID transaction manager for coherent memory map across hot plug interface

Storage management system and auto-RAID transaction manager for coherent memory map across hot plug interface

Arithmetic coding context model that accelerates adaptation for small amounts of data

Arithmetic coding compressor for encoding multiple bit values

Method and apparatus for use of a host address to validate accessed data

Method to reduce memory requirements in Asian printers while improving performance

Relative logarithmic time stamps for reduced memory map size

High speed system for image scaling

High speed system for threshold matrix alignment and tiling, during creation of a binary half-tone image

High speed system for grey level image scaling, threshold matrix alignment and tiling, and creation of a binary half-tone image

Arithmetic coding compressor using a context model that is adaptive to variable length patterns in bi-level image data

Arithmetic coding context model that adapts to the amount of data

Two dimensional context model obtained without a line buffer for arithmetic coding

Storing data compressed with arithmetic coding in non-contiguous memory

Compression system for reducing the occurrence of a literal prefix

SEAGATE TECHNOLOGY LLC

Methods and apparatus for verifying the installation of components in a system