Inventor
GALLES MICHAEL B
US28 patents
⚠️ This page may combine multiple inventors who share the name “GALLES MICHAEL B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SILICON GRAPHICS INC
9 patentsUS5504874AApr 2, 1996
System and method of implementing read resources to maintain cache coherency in a multiprocessor environment permitting split transactions
SILICON GRAPHICS INC131 citations99
US6230252B1May 8, 2001
Hybrid hypercube/torus architecture
SILICON GRAPHICS INC235 citations98
US5682479AOct 28, 1997
System and method for network exploration and access
SILICON GRAPHICS INC91 citations94
US5669008ASep 16, 1997
Hierarchical fat hypercube architecture for parallel processing systems
SILICON GRAPHICS INC40 citations92
US5664151ASep 2, 1997
System and method of implementing read resources to maintain cache coherency in a multiprocessor environment permitting split transactions
SILICON GRAPHICS INC24 citations92
US5655102AAug 5, 1997
System and method for piggybacking of read responses on a shared memory multiprocessor bus
SILICON GRAPHICS INC23 citations92
US5768529AJun 16, 1998
System and method for the synchronous transmission of data in a communication network utilizing a source clock signal to latch serial data into first registers and a handshake signal to latch parallel data into second registers
SILICON GRAPHICS INC46 citations90
US6651157B1Nov 18, 2003
Multi-processor system and method of accessing data therein
SILICON GRAPHICS INC10 citations73
US6529570B1Mar 4, 2003
Data synchronizer for a multiple rate clock source and method thereof
SILICON GRAPHICS INC11 citations71
CISCO TECH INC
6 patentsUS9152593B2Oct 6, 2015
Universal PCI express port
CISCO TECH INC35 citations94
US7304999B2Dec 4, 2007
Methods and apparatus for processing packets including distributing packets across multiple packet processing engines and gathering the processed packets from the processing engines
CISCO TECH INC27 citations92
US9152591B2Oct 6, 2015
Universal PCI express port
CISCO TECH INC4 citations68
US9019978B2Apr 28, 2015
Port mirroring at a network interface device
CISCO TECH INC3 citations60
US9152592B2Oct 6, 2015
Universal PCI express port
CISCO TECH INC1 citations57
US7478137B1Jan 13, 2009
Lightweight messaging with and without hardware guarantees
CISCO TECH INC0 citations40
GALLES MICHAEL B
4 patentsUS8788873B2Jul 22, 2014
Server input/output failover device serving highly available virtual devices
GALLES MICHAEL B23 citations92
US8804747B2Aug 12, 2014
Network interface controller for virtual and distributed services
GALLES MICHAEL B24 citations90
US8972611B2Mar 3, 2015
Multi-server consolidated input/output (IO) device
GALLES MICHAEL B10 citations83
US8904032B2Dec 2, 2014
Prefetch optimization of the communication of data using descriptor lists
GALLES MICHAEL B2 citations62
PENSANDO SYSTEMS INC
3 patentsUS11494189B2Nov 8, 2022
Methods and systems for processing data in a programmable data processing pipeline that includes out-of-pipeline processing
PENSANDO SYSTEMS INC3 citations73
US11275669B2Mar 15, 2022
Methods and systems for hardware-based statistics management using a general purpose memory
PENSANDO SYSTEMS INC2 citations73
US11249805B2Feb 15, 2022
Methods and systems for hardware-based memory resource allocation
PENSANDO SYSTEMS INC0 citations60
CISCO TECH IND
2 patentsUS6654342B1Nov 25, 2003
Accumulating and distributing flow control information via update messages and piggybacked flow control information in other messages in a packet switching system
CISCO TECH IND92 citations98
US6788689B1Sep 7, 2004
Route scheduling of packet streams to achieve bounded delay in a packet switching system
CISCO TECH IND30 citations93