P

Inventor

TRAN PHONG T

US22 patents
⚠️ This page may combine multiple inventors who share the name “TRAN PHONG T”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

18 patents
US6961886B2Nov 1, 2005

Diagnostic method for structural scan chain designs

IBM59 citations96
US7908532B2Mar 15, 2011

Automated system and processing for expedient diagnosis of broken shift registers latch chains

IBM22 citations91
US9552449B1Jan 24, 2017

Dynamic fault model generation for diagnostics simulation and pattern generation

IBM6 citations84
US7908534B2Mar 15, 2011

Diagnosable general purpose test registers scan chain design

IBM9 citations84
US7934134B2Apr 26, 2011

Method and apparatus for performing logic built-in self-testing of an integrated circuit

IBM11 citations83
US7930601B2Apr 19, 2011

AC ABIST diagnostic method, apparatus and program product

IBM11 citations82
US7395469B2Jul 1, 2008

Method for implementing deterministic based broken scan chain diagnostics

IBM12 citations80
US10024910B2Jul 17, 2018

Iterative N-detect based logic diagnostic technique

IBM3 citations73
US9852245B2Dec 26, 2017

Dynamic fault model generation for diagnostics simulation and pattern generation

IBM3 citations73
US7392449B2Jun 24, 2008

Method, apparatus, and computer program product for diagnosing a scan chain failure employing fuses coupled to the scan chain

IBM7 citations72
US7831863B2Nov 9, 2010

Method for enhancing the diagnostic accuracy of a VLSI chip

IBM5 citations63
US7921346B2Apr 5, 2011

Verification of array built-in self-test (ABIST) design-for-test/design-for-diagnostics (DFT/DFD)

IBM6 citations61
US7395470B2Jul 1, 2008

Method, apparatus, and computer program product for diagnosing a scan chain failure employing fuses coupled to the scan chain

IBM4 citations61
US11940271B2Mar 26, 2024

High power device fault localization via die surface contouring

IBM0 citations60
US10768230B2Sep 8, 2020

Built-in device testing of integrated circuits

IBM1 citations59
US7475308B2Jan 6, 2009

implementing deterministic based broken scan chain diagnostics

IBM2 citations58
US10254336B2Apr 9, 2019

Iterative N-detect based logic diagnostic technique

IBM0 citations52
US10169510B2Jan 1, 2019

Dynamic fault model generation for diagnostics simulation and pattern generation

IBM0 citations52

FORLENZA DONATO ORAZIO

2 patents

GRAND HAVEN STAMPED PRODUCTS

1 patent

(unassigned)

1 patent