P

Inventor

SPRANGLE ERIC

US36 patents
⚠️ This page may combine multiple inventors who share the name “SPRANGLE ERIC”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

24 patents
US8683183B2Mar 25, 2014

Performing a multiply-multiply-accumulate instruction

INTEL CORP45 citations98
US9170955B2Oct 27, 2015

Providing extended cache replacement state information

INTEL CORP59 citations96
US7984273B2Jul 19, 2011

System and method for using a mask register to track progress of gathering elements from memory

INTEL CORP45 citations95
US9829965B2Nov 28, 2017

Distribution of tasks among asymmetric processing elements

INTEL CORP11 citations92
US6925550B2Aug 2, 2005

Speculative scheduling of instructions with source operand validity bit and rescheduling upon carried over destination operand invalid bit detection

INTEL CORP30 citations92
US6721866B2Apr 13, 2004

Unaligned memory operands

INTEL CORP37 citations92
US11054890B2Jul 6, 2021

Distribution of tasks among asymmetric processing elements

INTEL CORP3 citations84
US9874926B2Jan 23, 2018

Distribution of tasks among asymmetric processing elements

INTEL CORP2 citations84
US9870046B2Jan 16, 2018

Distribution of tasks among asymmetric processing elements

INTEL CORP2 citations84
US9760162B2Sep 12, 2017

Distribution of tasks among asymmetric processing elements

INTEL CORP3 citations84
US9753530B2Sep 5, 2017

Distribution of tasks among asymmetric processing elements

INTEL CORP3 citations84
US7383418B2Jun 3, 2008

Method and apparatus for prefetching data to a lower level cache memory

INTEL CORP12 citations83
US10042814B2Aug 7, 2018

System and method for using a mask register to track progress of gathering and scattering elements between data registers and memory

INTEL CORP3 citations72
US9110655B2Aug 18, 2015

Performing a multiply-multiply-accumulate instruction

INTEL CORP1 citations63
US11366511B2Jun 21, 2022

Distribution of tasks among asymmetric processing elements

INTEL CORP0 citations62
US9939882B2Apr 10, 2018

Systems and methods for migrating processes among asymmetrical processing cores

INTEL CORP1 citations62
US9910483B2Mar 6, 2018

Distribution of tasks among asymmetric processing elements

INTEL CORP1 citations62
US10437320B2Oct 8, 2019

Distribution of tasks among asymmetric processing elements

INTEL CORP0 citations52
US10409360B2Sep 10, 2019

Distribution of tasks among asymmetric processing elements

INTEL CORP0 citations52
US10386915B2Aug 20, 2019

Distribution of tasks among asymmetric processing elements

INTEL CORP0 citations52
US9292900B2Mar 22, 2016

Partition-free multi-socket memory system architecture

INTEL CORP0 citations52
US8754899B2Jun 17, 2014

Partition-free multi-socket memory system architecture

INTEL CORP0 citations52
US9495153B2Nov 15, 2016

Methods, apparatus, and instructions for converting vector data

INTEL CORP0 citations51
US10181171B2Jan 15, 2019

Sharing resources between a CPU and GPU

INTEL CORP0 citations47

SPRANGLE ERIC

9 patents

HUM HERBERT

1 patent

FRYMAN JOSHUA B

1 patent

CORBAL JESUS

1 patent