Inventor
KHARE MUKESH V
US11 patents
⚠️ This page may combine multiple inventors who share the name “KHARE MUKESH V”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
7 patentsUS6096580AAug 1, 2000
Low programming voltage anti-fuse
IBM99 citations97
US6893979B2May 17, 2005
Method for improved plasma nitridation of ultra thin gate dielectrics
IBM21 citations91
US7671421B2Mar 2, 2010
CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials
IBM8 citations84
US6569781B1May 27, 2003
Method of forming an ultra-thin oxide layer on a silicon substrate by implantation of nitrogen through a sacrificial layer and subsequent annealing prior to oxide formation
IBM17 citations84
US6635517B2Oct 21, 2003
Use of disposable spacer to introduce gettering in SOI layer
IBM13 citations83
US7109559B2Sep 19, 2006
Nitrided ultra thin gate dielectrics
IBM6 citations72
US7943460B2May 17, 2011
High-K metal gate CMOS
IBM5 citations63
CHEN TZE-CHIANG
2 patentsUS8158481B2Apr 17, 2012
CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials
CHEN TZE-CHIANG5 citations73
US8785281B2Jul 22, 2014
CMOS structure and method for fabrication thereof using multiple crystallographic orientations and gate materials
CHEN TZE-CHIANG2 citations62