Inventor
GRAY MICHAEL S
US24 patents
⚠️ This page may combine multiple inventors who share the name “GRAY MICHAEL S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
14 patentsUS7484197B2Jan 27, 2009
Minimum layout perturbation-based artwork legalization with grid constraints for hierarchical designs
IBM297 citations98
US7503020B2Mar 10, 2009
IC layout optimization to improve yield
IBM110 citations97
US9158885B1Oct 13, 2015
Reducing color conflicts in triple patterning lithography
IBM52 citations92
US7761818B2Jul 20, 2010
Obtaining a feasible integer solution in a hierarchical circuit layout optimization
IBM10 citations84
US7062729B2Jun 13, 2006
Method and system for obtaining a feasible integer solution from a half-integer solution in hierarchical circuit layout optimization
IBM16 citations84
US7260790B2Aug 21, 2007
Integrated circuit yield enhancement using Voronoi diagrams
IBM15 citations83
US7117456B2Oct 3, 2006
Circuit area minimization using scaling
IBM7 citations73
US9971861B2May 15, 2018
Selective boundary overlay insertion for hierarchical circuit design
IBM3 citations71
US7895562B2Feb 22, 2011
Adaptive weighting method for layout optimization with multiple priorities
IBM5 citations62
US7818694B2Oct 19, 2010
IC layout optimization to improve yield
IBM2 citations62
US7735042B2Jun 8, 2010
Context aware sub-circuit layout modification
IBM4 citations62
US7120887B2Oct 10, 2006
Cloned and original circuit shape merging
IBM5 citations62
US7865848B2Jan 4, 2011
Layout optimization using parameterized cells
IBM3 citations61
US7490308B2Feb 10, 2009
Method for implementing overlay-based modification of VLSI design layout
IBM4 citations57
GRAY MICHAEL S
3 patentsUS8159467B2Apr 17, 2012
Meshed touchscreen pattern
GRAY MICHAEL S16 citations82
US8302062B2Oct 30, 2012
Methods to obtain a feasible integer solution in a hierarchical circuit layout optimization
GRAY MICHAEL S6 citations71
US8296706B2Oct 23, 2012
Handling two-dimensional constraints in integrated circuit layout
GRAY MICHAEL S4 citations61