Inventor

CHEN ZHENGANG

US123 patents

⚠️ This page may combine multiple inventors who share the name “CHEN ZHENGANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHEN ZHENGANG

SEAGATE TECHNOLOGY LLC

Internal copy-back with read-verify

Preventing programming errors from occurring when programming flash memory cells

Nonvolatile memory data recovery after power failure

Flash memory read error recovery with soft-decision decode

Systems and methods for soft decision generation in a solid state memory system

Periodically updating a log likelihood ratio (LLR) table in a flash memory controller

Reduction or elimination of a latency penalty associated with adjusting read thresholds for non-volatile memory

Cell-level statistics collection for detection and decoding in flash memories

Data decoder with trapping set flip bit mapper

Bad memory unit detection in a solid state drive

Estimating read reference voltage based on disparity and derivative metrics

Adjusting log likelihood ratio values to compensate misplacement of read voltages

Multiple retry reads in a read channel of a memory

Flash channel with selective decoder likelihood dampening

Policy for read operations addressing on-the-fly decoding failure in non-volatile memory

Read threshold voltage adaptation using bit error rates based on decoded data

Retention detection and/or channel tracking policy in a flash memory based storage system

Reduction or elimination of a latency penalty associated with adjusting read thresholds for non-volatile memory

Periodically updating a log likelihood ratio (LLR) table in a flash memory controller

Accelerated soft read for multi-level cell nonvolatile memories

Reduction or elimination of a latency penalty associated with adjusting read thresholds for non-volatile memory

Internal copy-back with read-verify

Nonvolatile memory recovery after power failure during write operations or erase operations

Capacitance coupling parameter estimation in flash memories

Eliminating or reducing programming errors when programming flash memory cells

Decoding with log likelihood ratios stored in a controller

MICRON TECHNOLOGY INC

Error correction based on rate adaptive low density parity check (LDPC) codes with flexible column weights in the parity check matrices

Performing a refresh operation based on a characteristic of a memory sub-system

Write buffer management

Read voltage-assisted manufacturing tests of memory sub-system

Configuring iterative error correction parameters using criteria from previous iterations

Self-seeded randomizer for data randomization in flash memory

Inserting temperature information into a codeword

Parity protection in non-volatile memory

Preemptive read refresh in memories with time-varying error rates

Self-seeded randomizer for data randomization in flash memory

Metadata aware copyback for memory devices

Self-adaptive read voltage adjustment using boundary error statistics for memories with time-varying error rates

Selecting read voltage using write transaction data

Self-adaptive read voltage adjustment using directional error statistics for memories with time-varying error rates

CHEN ZHENGANG

Mixed granularity higher-level redundancy for non-volatile memory

Mixed mapping for rate compatible trellis coded modulation

Flash memory read scrub and channel tracking

Systems and methods for generating soft information in NAND flash

LSI CORP

Method of optimizing solid state drive soft retry voltages

Method and apparatus for generation of soft decision error correction code information

Flash memory read error recovery with soft-decision decode

MARVELL INT LTD

Cyclic redundancy check for out-of-order codewords

MARVELL WORLD TRADE LTD

Inter-cell interference cancellation

WU YUNXIANG

Single read based soft-decision decoding of non-volatile memory