Inventor
JHA JITENDRA KUMAR
US8 patents
Patents
8 patentsUS12046654B2Jul 23, 2024
Integrated circuit structures including a titanium silicide material
INTEL CORP2 citations70
US12593486B2Mar 31, 2026
Dual contact process with selective deposition
INTEL CORP0 citations61
US12568644B2Mar 3, 2026
Contact over active gate structures with trench contact layers for advanced integrated circuit structure fabrication
INTEL CORP0 citations61
US12119387B2Oct 15, 2024
Low resistance approaches for fabricating contacts and the resulting structures
INTEL CORP1 citations61
US12402387B2Aug 26, 2025
Integrated circuit structures including a titanium silicide material
INTEL CORP0 citations60
US11923290B2Mar 5, 2024
Halogen treatment for NMOS contact resistance improvement
INTEL CORP0 citations59
US12439669B2Oct 7, 2025
Co-deposition of titanium and silicon for improved silicon germanium source and drain contacts
INTEL CORP0 citations58
US12310060B2May 20, 2025
Gate-all-around integrated circuit structures having uniform threshold voltages and tight gate endcap tolerances
INTEL CORP0 citations48