Inventor
GRUNOW STEPHAN
US44 patents
⚠️ This page may combine multiple inventors who share the name “GRUNOW STEPHAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
19 patentsUS7517736B2Apr 14, 2009
Structure and method of chemically formed anchored metallic vias
IBM34 citations93
US8056039B2Nov 8, 2011
Interconnect structure for integrated circuits having improved electromigration characteristics
IBM23 citations92
US7446036B1Nov 4, 2008
Gap free anchored conductor and dielectric structure and method for fabrication thereof
IBM42 citations91
US9142506B2Sep 22, 2015
E-fuse structures and methods of manufacture
IBM7 citations84
US8367544B2Feb 5, 2013
Self-aligned patterned etch stop layers for semiconductor devices
IBM16 citations84
US7737528B2Jun 15, 2010
Structure and method of forming electrically blown metal fuses for integrated circuits
IBM12 citations84
US7629264B2Dec 8, 2009
Structure and method for hybrid tungsten copper metal contact
IBM18 citations84
US9893011B2Feb 13, 2018
Back-end electrically programmable fuse
IBM2 citations73
US8742766B2Jun 3, 2014
Stacked via structure for metal fuse applications
IBM3 citations63
US7825019B2Nov 2, 2010
Structures and methods for reduction of parasitic capacitances in semiconductor integrated circuits
IBM4 citations63
US7776737B2Aug 17, 2010
Reliability of wide interconnects
IBM5 citations63
US7985928B2Jul 26, 2011
Gap free anchored conductor and dielectric structure and method for fabrication thereof
IBM3 citations62
US7888252B2Feb 15, 2011
Self-aligned contact
IBM4 citations62
US7833893B2Nov 16, 2010
Method for forming conductive structures
IBM5 citations62
US7671362B2Mar 2, 2010
Test structure for determining optimal seed and liner layer thicknesses for dual damascene processing
IBM6 citations62
US8026166B2Sep 27, 2011
Interconnect structures comprising capping layers with low dielectric constants and methods of making the same
IBM3 citations59
US10229875B2Mar 12, 2019
Stacked via structure for metal fuse applications
IBM0 citations52
US9360525B2Jun 7, 2016
Stacked via structure for metal fuse applications
IBM0 citations52
US7456099B2Nov 25, 2008
Method of forming a structure for reducing lateral fringe capacitance in semiconductor devices
IBM0 citations52
TEXAS INSTRUMENTS INC
14 patentsUS6864108B1Mar 8, 2005
Measurement of wafer temperature in semiconductor processing chambers
TEXAS INSTRUMENTS INC29 citations92
US7148140B2Dec 12, 2006
Partial plate anneal plate process for deposition of conductive fill material
TEXAS INSTRUMENTS INC27 citations90
US7179747B2Feb 20, 2007
Use of supercritical fluid for low effective dielectric constant metallization
TEXAS INSTRUMENTS INC17 citations83
US7642619B2Jan 5, 2010
Air gap in integrated circuit inductor fabrication
TEXAS INSTRUMENTS INC8 citations82
US7037837B2May 2, 2006
Method of fabricating robust nucleation/seed layers for subsequent deposition/fill of metallization layers
TEXAS INSTRUMENTS INC13 citations82
US7189615B2Mar 13, 2007
Single mask MIM capacitor and resistor with in trench copper drift barrier
TEXAS INSTRUMENTS INC18 citations81
US7338893B2Mar 4, 2008
Integration of pore sealing liner into dual-damascene methods and devices
TEXAS INSTRUMENTS INC17 citations79
US7115467B2Oct 3, 2006
Metal insulator metal (MIM) capacitor fabrication with sidewall barrier removal aspect
TEXAS INSTRUMENTS INC9 citations72
US7256121B2Aug 14, 2007
Contact resistance reduction by new barrier stack process
TEXAS INSTRUMENTS INC7 citations71
US7485963B2Feb 3, 2009
Use of supercritical fluid for low effective dielectric constant metallization
TEXAS INSTRUMENTS INC2 citations62
US6900127B2May 31, 2005
Multilayer integrated circuit copper plateable barriers
TEXAS INSTRUMENTS INC5 citations62
US7781884B2Aug 24, 2010
Method of fabrication of on-chip heat pipes and ancillary heat transfer components
TEXAS INSTRUMENTS INC5 citations61
US7566627B2Jul 28, 2009
Air gap in integrated circuit inductor fabrication
TEXAS INSTRUMENTS INC5 citations61
US7674707B2Mar 9, 2010
Manufacturable reliable diffusion-barrier
TEXAS INSTRUMENTS INC2 citations60
BONILLA GRISELDA
5 patentsUS8962467B2Feb 24, 2015
Metal fuse structure for improved programming capability
BONILLA GRISELDA6 citations84
US8232646B2Jul 31, 2012
Interconnect structure for integrated circuits having enhanced electromigration resistance
BONILLA GRISELDA17 citations84
US8298948B2Oct 30, 2012
Capping of copper interconnect lines in integrated circuit devices
BONILLA GRISELDA2 citations62
US8836124B2Sep 16, 2014
Fuse and integrated conductor
BONILLA GRISELDA2 citations61
US9059169B2Jun 16, 2015
E-fuse structures and methods of manufacture
BONILLA GRISELDA0 citations52