Inventor
LIN KUO-WEI
TW25 patents
⚠️ This page may combine multiple inventors who share the name “LIN KUO-WEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG
22 patentsUS6605524B1Aug 12, 2003
Bumping process to increase bump height and to create a more robust bump structure
TAIWAN SEMICONDUCTOR MFG78 citations98
US6482669B1Nov 19, 2002
Colors only process to reduce package yield loss
TAIWAN SEMICONDUCTOR MFG81 citations98
US6426281B1Jul 30, 2002
Method to form bump in bumping technology
TAIWAN SEMICONDUCTOR MFG147 citations98
US6586323B1Jul 1, 2003
Method for dual-layer polyimide processing on bumping technology
TAIWAN SEMICONDUCTOR MFG76 citations97
US6632700B1Oct 14, 2003
Method to form a color image sensor cell while protecting the bonding pad structure from damage
TAIWAN SEMICONDUCTOR MFG58 citations96
US6977213B1Dec 20, 2005
IC chip solder bump structure and method of manufacturing same
TAIWAN SEMICONDUCTOR MFG19 citations92
US6956292B2Oct 18, 2005
Bumping process to increase bump height and to create a more robust bump structure
TAIWAN SEMICONDUCTOR MFG37 citations92
US6936923B2Aug 30, 2005
Method to form very a fine pitch solder bump using methods of electroplating
TAIWAN SEMICONDUCTOR MFG23 citations92
US6876049B2Apr 5, 2005
Colors only process to reduce package yield loss
TAIWAN SEMICONDUCTOR MFG12 citations92
US6649507B1Nov 18, 2003
Dual layer photoresist method for fabricating a mushroom bumping plating structure
TAIWAN SEMICONDUCTOR MFG33 citations92
US6583039B2Jun 24, 2003
Method of forming a bump on a copper pad
TAIWAN SEMICONDUCTOR MFG37 citations92
US6372545B1Apr 16, 2002
Method for under bump metal patterning of bumping process
TAIWAN SEMICONDUCTOR MFG22 citations92
US6958546B2Oct 25, 2005
Method for dual-layer polyimide processing on bumping technology
TAIWAN SEMICONDUCTOR MFG45 citations90
US6756184B2Jun 29, 2004
Method of making tall flip chip bumps
TAIWAN SEMICONDUCTOR MFG29 citations89
US6319846B1Nov 20, 2001
Method for removing solder bodies from a semiconductor wafer
TAIWAN SEMICONDUCTOR MFG26 citations89
US6534396B1Mar 18, 2003
Patterned conductor layer pasivation method with dimensionally stabilized planarization
TAIWAN SEMICONDUCTOR MFG20 citations86
US7183598B2Feb 27, 2007
Colors only process to reduce package yield loss
TAIWAN SEMICONDUCTOR MFG10 citations84
US7119002B2Oct 10, 2006
Solder bump composition for flip chip
TAIWAN SEMICONDUCTOR MFG13 citations84
US6426283B1Jul 30, 2002
Method for bumping and backlapping a semiconductor wafer
TAIWAN SEMICONDUCTOR MFG10 citations74
US7485906B2Feb 3, 2009
Colors only process to reduce package yield loss
TAIWAN SEMICONDUCTOR MFG2 citations63
US7884471B2Feb 8, 2011
Solder bump and related intermediate structure having primary and secondary portions and method of manufacturing same
TAIWAN SEMICONDUCTOR MFG1 citations51
US6784002B1Aug 31, 2004
Method to make wafer laser marks visable after bumping process
TAIWAN SEMICONDUCTOR MFG1 citations43