Inventor

PASTORELLO DOUGLAS F

US32 patents

⚠️ This page may combine multiple inventors who share the name “PASTORELLO DOUGLAS F”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PASTORELLO DOUGLAS F

SILICON LAB INC

Auto-detection between referenceless and reference clock mode of operation

Offset correction and slicing level adjustment for amplifier circuits

Spur cancellation in a PLL system with an automatically updated target spur frequency

Differential voltage-controlled oscillator analog-to-digital converter using input-referred offset

Modified first-order noise-shaping dynamic-element-matching technique

Programmable frequency divider

Metastable-free output synchronization for multiple-chip systems and the like

Calibration of an interpolative divider using a virtual phase-locked loop

High-speed divider with reduced power consumption

Phase selectable divider circuit

Tri-level test mode terminal in limited terminal environment

Programmable I/O cell capable of holding its state in power-down mode

MCU with power saving mode

High-speed divider with pulse-width control

Memory power controller

CIRRUS LOGIC INC

Single phase bi-directional electrical measurement systems and methods using ADCs

Digital phase compensation methods and systems for a dual-channel analog-to-digital converter

Energy-to-pulse converter systems, devices, and methods wherein the output frequency is greater than the calculation frequency and having output phasing

High pass filtering with automatic phase equalization

Single wire interface for an analog to digital converter

Delay correction system and method for a voltage channel in a sampled data measurement system

Throughput for a serial interface

Delay systems and methods using a variable delay SINC filter

Definition of physical level of a logic output by a logic input

Delay systems and methods using a variable delay sinc filter

Method and apparatus for handling a framing error at a serial interface by forcing invalid commands to be read upon determine the command is invalid

SKYWORKS SOLUTIONS INC

Calibration of a time-to-digital converter using a virtual phase-locked loop

Calibration of a time-to-digital converter using a virtual phase-locked loop

Calibration of a time-to-digital converter using a virtual phase-locked loop

SILICON LAB

Microcontroller unit (MCU) with power saving mode

Programmable I/O cell capable of holding its state in power-down mode

CRYSTAL SEMICONDUCTOR CORP

Reduced power FIR filter