Inventor

CALLISON RYAN A

US38 patents

⚠️ This page may combine multiple inventors who share the name “CALLISON RYAN A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CALLISON RYAN A

GALLOWAY WILLIAM C

Method and system for rebuilding data in a distributed RAID system

Method and system for initializing storage in a storage system

Method and system for rebuilding data in a distributed RAID system

Method and system for placement of data on a storage device

Method and system for distributed raid implementation

Method and system for distributing commands to targets

Method and system for distributed RAID implementation

Method and system for rebuilding data in a distributed RAID system

Method and system for initializing storage in a storage system

Method and system for distributing commands to targets

Method and system for distributed RAID implementation

Method and system for placement of data on a storage device

Method and system for data migration in a distributed RAID implementation

Method and system for protecting against multiple failures in a RAID system

Method and system for data migration in a distributed RAID implementation

Method and system for execution of applications in conjunction with raid

Method and system for execution of applications in conjunction with distributed RAID

COMPAQ COMPUTER CORP

Raid XOR operations to synchronous DRAM using a read buffer and pipelining of synchronous DRAM burst read data

Disk array controller for performing exclusive or operations

Circuit for selectively performing data format conversion

Apparatus and method for combining data streams with programmable wait states

Adaptive ahead FIFO with LRU replacement

Disk array controller having internal protocol for sending address/transfer count information during first/second load cycles and transferring data after receiving an acknowldgement

Disk array controller with parity capabilities

Disk drive controller with a posted write cache memory

Bridge having a data buffer for each bus master

Apparatus and method for synchronously providing a fullness indication of a dual ported buffer situated between two asynchronous buses

Disk array controller having command descriptor blocks utilized by bus master and bus slave for respectively performing data transfer operations

Device controller with a separate command path between a host and the device and a separate data path including a first in, first out memory between the host and the device

Memory interface controller for datum raid operations with a datum multiplier

HEWLETT PACKARD DEVELOPMENT CO

Disconnecting a device on a cache line boundary in response to a write command

Dynamic routing of data across multiple data paths from a source controller to a destination controller

Dynamic remapping of address registers for address translation between multiple busses

Providing data in response to a read command that maintains cache line alignment

PIVOT3 INC

Method and system for distributed RAID implementation

Method and system for protecting against multiple failures in a raid system

Method and system for distributed raid implementation

Method and system for execution of applications in conjunction with raid