Inventor
WHEATER DONALD L
US31 patents
⚠️ This page may combine multiple inventors who share the name “WHEATER DONALD L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
26 patentsUS6233184B1May 15, 2001
Structures for wafer level test and burn-in
IBM102 citations98
US6768694B2Jul 27, 2004
Method of electrically blowing fuses under control of an on-chip tester interface apparatus
IBM84 citations96
US6618682B2Sep 9, 2003
Method for test optimization using historical and actual fabrication test data
IBM88 citations95
US5899703AMay 4, 1999
Method for chip testing
IBM51 citations95
US6426641B1Jul 30, 2002
Single pin performance screen ring oscillator with frequency division
IBM77 citations94
US6426904B2Jul 30, 2002
Structures for wafer level test and burn-in
IBM43 citations92
US6073258AJun 6, 2000
Method and device for performing two dimensional redundancy calculations on embedded memories avoiding fail data collection
IBM29 citations92
US7073100B2Jul 4, 2006
Method for testing embedded DRAM arrays
IBM16 citations90
US6708305B1Mar 16, 2004
Deterministic random LBIST
IBM29 citations90
US6333706B1Dec 25, 2001
Built-in self-test for analog to digital converter
IBM35 citations89
US6229465B1May 8, 2001
Built in self test method and structure for analog to digital converter
IBM27 citations88
US7870454B2Jan 11, 2011
Structure for system for and method of performing high speed memory diagnostics via built-in-self-test
IBM9 citations84
US7607060B2Oct 20, 2009
System and method for performing high speed memory diagnostics via built-in-self-test
IBM13 citations84
US7103814B2Sep 5, 2006
Testing logic and embedded memory in parallel
IBM16 citations81
US6549150B1Apr 15, 2003
Integrated test structure and method for verification of microelectronic devices
IBM16 citations77
US7490280B2Feb 10, 2009
Microcontroller for logic built-in self test (LBIST)
IBM6 citations74
US6730529B1May 4, 2004
Method for chip testing
IBM8 citations73
US7435990B2Oct 14, 2008
Arrangement for testing semiconductor chips while incorporated on a semiconductor wafer
IBM7 citations72
US6724210B2Apr 20, 2004
Method and apparatus for reduced pin count package connection verification
IBM5 citations72
US7237165B2Jun 26, 2007
Method for testing embedded DRAM arrays
IBM9 citations71
US7381986B2Jun 3, 2008
Arrangement for testing semiconductor chips while incorporated on a semiconductor wafer
IBM6 citations69
US7145977B2Dec 5, 2006
Diagnostic method and apparatus for non-destructively observing latch data
IBM2 citations62
US6804803B2Oct 12, 2004
Method for testing integrated logic circuits
IBM5 citations61
US6931346B2Aug 16, 2005
Method and apparatus for reduced pin count package connection verification
IBM1 citations50
US7453973B2Nov 18, 2008
Diagnostic method and apparatus for non-destructively observing latch data
IBM0 citations49
US7916826B2Mar 29, 2011
Diagnostic method and apparatus for non-destructively observing latch data
IBM0 citations48