Inventor
JOSSE EMMANUEL
FR10 patents
⚠️ This page may combine multiple inventors who share the name “JOSSE EMMANUEL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ST MICROELECTRONICS SA
8 patentsUS6861684B2Mar 1, 2005
Method of fabricating a vertical insulated gate transistor with low overlap of the gate on the source and the drain, and an integrated circuit including this kind of transistor
ST MICROELECTRONICS SA44 citations92
US6746923B2Jun 8, 2004
Method of fabricating a vertical quadruple conduction channel insulated gate transistor
ST MICROELECTRONICS SA33 citations92
US7078764B2Jul 18, 2006
Method of fabricating a vertical quadruple conduction channel insulated gate transistor, and integrated circuit including this kind of transistor
ST MICROELECTRONICS SA2 citations62
US9318372B2Apr 19, 2016
Method of stressing a semiconductor layer
ST MICROELECTRONICS SA2 citations60
US9305828B2Apr 5, 2016
Method of forming stressed SOI layer
ST MICROELECTRONICS SA2 citations59
US7504683B2Mar 17, 2009
Integrated electronic circuit incorporating a capacitor
ST MICROELECTRONICS SA3 citations59
US9543214B2Jan 10, 2017
Method of forming stressed semiconductor layer
ST MICROELECTRONICS SA0 citations36
US9735772B2Aug 15, 2017
Multi-orientation integrated cell, in particular input/output cell of an integrated circuit
ST MICROELECTRONICS SA0 citations35