Inventor
BALDWIN DAVID R
GB35 patents
⚠️ This page may combine multiple inventors who share the name “BALDWIN DAVID R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ZIILABS INC LTD
7 patentsUS9349215B1May 24, 2016
Multiple simultaneous bin sizes
ZIILABS INC LTD13 citations92
US9406168B1Aug 2, 2016
Multi-sample antialiasing optimization via edge tracking
ZIILABS INC LTD7 citations84
US10262459B1Apr 16, 2019
Multiple simultaneous bin sizes
ZIILABS INC LTD2 citations73
US9916643B1Mar 13, 2018
Multi-sample antialiasing optimization via edge tracking
ZIILABS INC LTD3 citations73
US9990768B1Jun 5, 2018
Multiple simultaneous bin sizes
ZIILABS INC LTD1 citations62
US9679364B1Jun 13, 2017
Multi-sample antialiasing optimization via edge tracking
ZIILABS INC LTD1 citations62
US10162642B2Dec 25, 2018
Shader with global and instruction caches
ZIILABS INC LTD0 citations52
BALDWIN DAVID R
4 patentsUS9218689B1Dec 22, 2015
Multi-sample antialiasing optimization via edge tracking
BALDWIN DAVID R45 citations97
US8643659B1Feb 4, 2014
Shader with global and instruction caches
BALDWIN DAVID R32 citations93
US8144156B1Mar 27, 2012
Sequencer with async SIMD array
BALDWIN DAVID R46 citations93
US8223157B1Jul 17, 2012
Stochastic super sampling or automatic accumulation buffering
BALDWIN DAVID R17 citations80
3DLABS INC LTD
3 patentsTOSHIBA KK
3 patentsUS4827413AMay 2, 1989
Modified back-to-front three dimensional reconstruction algorithm
TOSHIBA KK59 citations94
US4733396AMar 22, 1988
Apparatus for detecting and correcting data transfer errors of a magnetic disk system
TOSHIBA KK37 citations90
US4797755AJan 10, 1989
System and method for transferring data between a plurality of disks and a memory
TOSHIBA KK19 citations71
KENT OSMAN
3 patentsINTELLECTUAL PIXELS LTD
3 patentsINTEL CORP
3 patentsUS10147225B2Dec 4, 2018
Method and apparatus for sampling pattern generation for a ray tracing architecture
INTEL CORP2 citations73
US10909753B2Feb 2, 2021
Method and apparatus for sampling pattern generation for a ray tracing architecture
INTEL CORP0 citations62
US10580201B2Mar 3, 2020
Method and apparatus for sampling pattern generation for a ray tracing architecture
INTEL CORP0 citations52
HONEYWELL INF SYSTEMS
3 patentsUS4462110AJul 24, 1984
Digital phase-locked loop
HONEYWELL INF SYSTEMS15 citations72
US4441195AApr 3, 1984
Short term response enhancement for digital phase-locked loop
HONEYWELL INF SYSTEMS2 citations61
US4396991AAug 2, 1983
Long term response enhancement for digital phase-locked loop
HONEYWELL INF SYSTEMS3 citations61