Inventor

CHAN VICTOR W C

US17 patents

⚠️ This page may combine multiple inventors who share the name “CHAN VICTOR W C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHAN VICTOR W C

IBM

Semiconductor transistors with expanded top portions of gates

Substrate engineering for optimum CMOS device performance

Gate contact over active enabled by alternative spacer scheme and claw-shaped cap

Avoiding gate metal via shorting to source or drain contacts

Self-aligned gate cap including an etch-stop layer

Method of applying stresses to PFET and NFET transistor channels for improved performance

Structure fabrication method

Substrate engineering for optimum CMOS device performance

Single metallization scheme for gate, source, and drain contact integration

Single metallization scheme for gate, source, and drain contact integration

Heater for phase change material memory cell

Self-aligned gate cap including an etch-stop layer

High threshold voltage NMOS transistors for low power IC technology

Avoiding gate metal via shorting to source or drain contacts

CHARTERED SEMICONDUCTOR MFG

Structure and method of applying stresses to PFET and NFET transistor channels for improved performance

ANDERSON BRENT ALAN

Semiconductor transistors with expanded top portions of gates

CHAN VICTOR W C

High threshold voltage NMOS transistors for low power IC technology