Inventor

JENG MIN-CHIE

TW48 patents

⚠️ This page may combine multiple inventors who share the name “JENG MIN-CHIE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JENG MIN-CHIE

TAIWAN SEMICONDUCTOR MFG CO LTD

Methods and apparatus for transmission lines in packages

Semiconductor structure

Methods and apparatus for transmission lines in packages

Method and system for integrated circuit design with on-chip variation and spatial correlation

Simulation scheme including self heating effect

Method of forming semiconductor package transmission lines with micro-bump lines

Semiconductor structure

Differential MOSCAP device

Filter and capacitor using redistribution layer and micro bump layer

Compact vertical inductors extending in vertical planes

Integrated capacitor

Filter and capacitor using redistribution layer and micro bump layer

Method for establishing aging model of device and analyzing aging state of device with aging model

Filter and capacitor using redistribution layer and micro bump layer

Compact vertical inductors extending in vertical planes

Compact vertical inductors extending in vertical planes

Filter and capacitor using redistribution layer and micro bump layer

Methods of manufacturing a package

Structure and method for a high-K transformer with capacitive coupling

4 port L-2L de-embedding method

Method of forming an inductor with magnetic material

Method and system for integrated circuit design with on-chip variation and spatial correlation

TAIWAN SEMICONDUCTOR MFG

Helical spiral inductor between stacking die

Methods and apparatus for transmission lines in packages

Methods and apparatus for inductors and transformers in packages

Inductor with magnetic material

Antenna using through-silicon via

Integrated capacitor

Transmission line formed adjacent seal ring

Tuning the efficiency in the transmission of radio-frequency signals using micro-bumps

Constructing mapping between model parameters and electrical parameters

Apparatus and methods for de-embedding through substrate vias

YEN HSIAO-TSUNG

Integrated antenna structure on separate semiconductor die

Structure and method for a fishbone differential capacitor

Tuning the efficiency in the transmission of radio-frequency signals using micro-bumps

Apparatus and methods for de-embedding through substrate vias

Structure and method for a high-K transformer with capacitive coupling

Antenna using through-silicon via

Compact vertical inductors extending in vertical planes

SU TING CHIEH

System and method for I/O ESD protection with floating and/or biased polysilicon regions

System and method for I/O ESD protection with polysilicon regions fabricated by processes for making core transistors

System and method for input pin ESD protection with floating and/or biased polysilicon regions

LU JHE-CHING

Balun system and method

LO JIA-LIN

Circuit device reliability simulation system

YEN HSIAO TSUNG

Semiconductor structure

CADENCE DESIGN SYSTEMS INC

Method and system for simulating dynamic behavior of a transistor

CHO HSIU-YING

Transmission line characterization using EM calibration

SEMICONDUCTOR MFG INT SHANGHAI

System and method for I/O ESD protection with polysilicon regions fabricated by processes for making core transistors