Inventor
CHALASANI PRASAD
US22 patents
⚠️ This page may combine multiple inventors who share the name “CHALASANI PRASAD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INVECAS INC
8 patentsUS9971975B2May 15, 2018
Optimal data eye for improved Vref margin
INVECAS INC7 citations80
US10014866B2Jul 3, 2018
Clock alignment scheme for data macros of DDR PHY
INVECAS INC2 citations72
US9715907B1Jul 25, 2017
Optimal data eye for improved Vref margin
INVECAS INC5 citations69
US10094859B1Oct 9, 2018
Voltage detector
INVECAS INC2 citations68
US10505550B1Dec 10, 2019
Method and apparatus of operating synchronizing high-speed clock dividers to correct clock skew
INVECAS INC2 citations66
US10502769B2Dec 10, 2019
Digital voltmeter
INVECAS INC0 citations51
US9954538B2Apr 24, 2018
Clock alignment scheme for data macros of DDR PHY
INVECAS INC0 citations51
US10361684B2Jul 23, 2019
Duty cycle detection
INVECAS INC0 citations46
MEDIAMATH INC
4 patentsUS10467659B2Nov 5, 2019
Methods, systems, and devices for counterfactual-based incrementality measurement in digital ad-bidding platform
MEDIAMATH INC25 citations90
US11556964B2Jan 17, 2023
Methods, systems, and devices for counterfactual-based incrementality measurement in digital ad-bidding platform
MEDIAMATH INC2 citations69
US11170413B1Nov 9, 2021
Methods, systems, and devices for counterfactual-based incrementality measurement in digital ad-bidding platform
MEDIAMATH INC0 citations58
US10977697B2Apr 13, 2021
Methods, systems, and devices for counterfactual-based incrementality measurement in digital ad-bidding platform
MEDIAMATH INC0 citations58
KOOL CHIP INC
3 patentsUS9564905B2Feb 7, 2017
Methods and systems for clocking a physical layer interface
KOOL CHIP INC4 citations82
US9467149B2Oct 11, 2016
Methods and systems for distributing clock and reset signals across an address macro
KOOL CHIP INC4 citations82
US9349421B2May 24, 2016
Memory interface
KOOL CHIP INC0 citations40