Inventor
MONTERO ADRIAN
US11 patents
⚠️ This page may combine multiple inventors who share the name “MONTERO ADRIAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
QUALCOMM INC
6 patentsUS12367157B2Jul 22, 2025
Compressing translation lookaside buffer (TLB) tags using a TLB metadata buffer in processor-based devices
QUALCOMM INC0 citations59
US12130751B2Oct 29, 2024
Compressing translation lookaside buffer (TLB) tags using a TLB metadata buffer in processor-based devices
QUALCOMM INC0 citations59
US12541461B2Feb 3, 2026
Filtering remote data synchronization barrier (DSB) instruction execution in processor-based devices
QUALCOMM INC0 citations58
US12135652B2Nov 5, 2024
Filtering remote data synchronization barrier (DSB) instruction execution in processor-based devices
QUALCOMM INC0 citations58
US11914524B2Feb 27, 2024
Latency management in synchronization events
QUALCOMM INC0 citations47
US12455832B1Oct 28, 2025
Compressing data portions in a translation lookaside buffer
QUALCOMM INC0 citations43
ADVANCED RISC MACH LTD
5 patentsUS11442863B2Sep 13, 2022
Data processing apparatus and method for generating prefetches
ADVANCED RISC MACH LTD8 citations84
US11385896B2Jul 12, 2022
Determining prefetch patterns with discontinuous strides
ADVANCED RISC MACH LTD3 citations71
US10102143B2Oct 16, 2018
Eviction control for an address translation cache
ADVANCED RISC MACH LTD1 citations51
US10776043B2Sep 15, 2020
Storage circuitry request tracking
ADVANCED RISC MACH LTD0 citations50
US10810126B2Oct 20, 2020
Cache storage techniques
ADVANCED RISC MACH LTD0 citations40