Inventor
LINIGER ERIC GERHARD
US9 patents
Patents
9 patentsUS6022791AFeb 8, 2000
Chip crack stop
IBM222 citations94
US6455443B1Sep 24, 2002
Method of fabricating low-dielectric constant interlevel dielectric films for BEOL interconnects with enhanced adhesion and low-defect density
IBM60 citations93
US7247946B2Jul 24, 2007
On-chip Cu interconnection using 1 to 5 nm thick metal cap
IBM35 citations91
US6177360B1Jan 23, 2001
Process for manufacture of integrated circuit device
IBM39 citations91
US6636290B1Oct 21, 2003
Methods of forming liquid display panels and the like wherein using two-component epoxy sealant
IBM32 citations90
US5953627ASep 14, 1999
Process for manufacture of integrated circuit device
IBM40 citations90
US6171873B1Jan 9, 2001
Method and apparatus for preventing chip breakage during semiconductor manufacturing using wafer grinding striation information
IBM15 citations89
US5888838AMar 30, 1999
Method and apparatus for preventing chip breakage during semiconductor manufacturing using wafer grinding striation information
IBM25 citations89
US7357977B2Apr 15, 2008
Ultralow dielectric constant layer with controlled biaxial stress
IBM10 citations83