Inventor

SEGAL JULIE

US6 patents

⚠️ This page may combine multiple inventors who share the name “SEGAL JULIE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HEURISTICS PHYSICS LAB INC

3 patents

US6745370B1Jun 1, 2004

Method for selecting an optimal level of redundancy in the design of memories

HEURISTICS PHYSICS LAB INC29 citations89

US6920596B2Jul 19, 2005

Method and apparatus for determining fault sources for device failures

HEURISTICS PHYSICS LAB INC16 citations81

US6810510B2Oct 26, 2004

Method for eliminating false failures saved by redundant paths during circuit area analysis on an integrated circuit layout

HEURISTICS PHYSICS LAB INC12 citations68

HPL TECHNOLOGIES INC

2 patents

US6795953B2Sep 21, 2004

Method for avoiding false failures attributable to dummy interconnects during defect analysis of an integrated circuit design

HPL TECHNOLOGIES INC195 citations93

US6780656B2Aug 24, 2004

Correction of overlay offset between inspection layers

HPL TECHNOLOGIES INC2 citations58

HUERISTICS PHYSICS LAB

1 patent

US6701477B1Mar 2, 2004

Method for identifying the cause of yield loss in integrated circuit manufacture

HUERISTICS PHYSICS LAB28 citations87