Inventor
GRAF RICHARD S
US45 patents
⚠️ This page may combine multiple inventors who share the name “GRAF RICHARD S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
25 patentsUS9536732B2Jan 3, 2017
Low temperature fabrication of lateral thin film varistor
IBM5 citations84
US9356089B1May 31, 2016
Low temperature fabrication of lateral thin film varistor
IBM4 citations84
US9184112B1Nov 10, 2015
Cooling apparatus for an integrated circuit
IBM18 citations84
US10476227B2Nov 12, 2019
Dual bond pad structure for photonics
IBM3 citations73
US9913405B2Mar 6, 2018
Glass interposer with embedded thermoelectric devices
IBM2 citations73
US9608403B2Mar 28, 2017
Dual bond pad structure for photonics
IBM2 citations73
US9472483B2Oct 18, 2016
Integrated circuit cooling apparatus
IBM3 citations73
US8988140B2Mar 24, 2015
Real-time adaptive voltage control of logic blocks
IBM5 citations73
US10340241B2Jul 2, 2019
Chip-on-chip structure and methods of manufacture
IBM4 citations72
US10978416B2Apr 13, 2021
Dual bond pad structure for photonics
IBM0 citations62
US10734346B2Aug 4, 2020
Method of manufacturing chip-on-chip structure comprising sinterted pillars
IBM1 citations62
US8907470B2Dec 9, 2014
Millimeter wave wafer level chip scale packaging (WLCSP) device and related method
IBM2 citations62
US10833038B2Nov 10, 2020
Dual bond pad structure for photonics
IBM0 citations52
US10170224B2Jan 1, 2019
Low temperature fabrication of lateral thin film varistor
IBM0 citations52
US9870851B2Jan 16, 2018
Low temperature fabrication of lateral thin film varistor
IBM0 citations52
US9865674B2Jan 9, 2018
Low temperature fabrication of lateral thin film varistor
IBM0 citations52
US9559283B2Jan 31, 2017
Integrated circuit cooling using embedded peltier micro-vias in substrate
IBM1 citations52
US9236361B2Jan 12, 2016
Millimeter wave wafer level chip scale packaging (WLCSP) device
IBM0 citations52
US9196592B2Nov 24, 2015
Methods of managing metal density in dicing channel and related integrated circuit structures
IBM0 citations52
US9159692B2Oct 13, 2015
Millimeter wave wafer level chip scale packaging (WLCSP) device and related method
IBM0 citations52
US9570422B2Feb 14, 2017
Semiconductor TSV device package for circuit board connection
IBM1 citations51
US9508690B2Nov 29, 2016
Semiconductor TSV device package for circuit board connection
IBM1 citations51
US9484239B2Nov 1, 2016
Sacrificial carrier dicing of semiconductor wafers
IBM0 citations51
US9478453B2Oct 25, 2016
Sacrificial carrier dicing of semiconductor wafers
IBM1 citations51
US9941458B2Apr 10, 2018
Integrated circuit cooling using embedded peltier micro-vias in substrate
IBM0 citations42
GLOBALFOUNDRIES INC
13 patentsUS10083891B1Sep 25, 2018
Memory having thermoelectric heat pump and related IC chip package and method
GLOBALFOUNDRIES INC23 citations94
US9368425B2Jun 14, 2016
Embedded heat spreader with electrical properties
GLOBALFOUNDRIES INC7 citations83
US9741695B2Aug 22, 2017
Three-dimensional hybrid packaging with through-silicon-vias and tape-automated-bonding
GLOBALFOUNDRIES INC4 citations73
US9659835B1May 23, 2017
Techniques for integrating thermal via structures in integrated circuits
GLOBALFOUNDRIES INC3 citations67
US10249590B2Apr 2, 2019
Stacked dies using one or more interposers
GLOBALFOUNDRIES INC1 citations62
US10043962B2Aug 7, 2018
Thermoelectric cooling using through-silicon vias
GLOBALFOUNDRIES INC1 citations52
US9972606B2May 15, 2018
Three-dimensional hybrid packaging with through-silicon-vias and tape-automated-bonding
GLOBALFOUNDRIES INC0 citations52
US9585257B2Feb 28, 2017
Method of forming a glass interposer with thermal vias
GLOBALFOUNDRIES INC0 citations52
US9299590B1Mar 29, 2016
Integrated micro-peltier cooling components in silicon-on-insulator (SOI) layers
GLOBALFOUNDRIES INC0 citations52
US9496234B1Nov 15, 2016
Wafer-level chip-scale package structure utilizing conductive polymer
GLOBALFOUNDRIES INC0 citations51
US10304763B2May 28, 2019
Producing wafer level packaging using leadframe strip and related device
GLOBALFOUNDRIES INC0 citations47
US9892999B2Feb 13, 2018
Producing wafer level packaging using leadframe strip and related device
GLOBALFOUNDRIES INC0 citations47
US9754911B2Sep 5, 2017
IC structure with angled interconnect elements
GLOBALFOUNDRIES INC0 citations40
GRAF RICHARD S
3 patentsUS8756549B2Jun 17, 2014
Integrated circuit chip incorporating embedded thermal radiators for localized, on-demand, heating and a system and method for designing such an integrated circuit chip
GRAF RICHARD S6 citations71
US8304290B2Nov 6, 2012
Overcoming laminate warpage and misalignment in flip-chip packages
GRAF RICHARD S3 citations60
US8448118B2May 21, 2013
Determining intra-die wirebond pad placement locations in integrated circuit
GRAF RICHARD S2 citations59