Inventor

BRINGIVIJAYARAGHAVAN VENKATRAGHAVAN

IN56 patents

⚠️ This page may combine multiple inventors who share the name “BRINGIVIJAYARAGHAVAN VENKATRAGHAVAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BRINGIVIJAYARAGHAVAN VENKATRAGHAVAN

GLOBALFOUNDRIES INC

Data aware write scheme for SRAM

Stacked memory device control

Bias temperature instability state detection and correction

Wordline driver with integrated voltage level shift function

Intracycle bitline restore in high performance memory

Sense amplifier and latching scheme

High performance sense amplifier

Column-dependent positive voltage boost for memory cell supply voltage

Bending circuit for static random access memory (SRAM) self-timer

Sense amplifiers and multiplexed latches

Write assist

Bit line strapping scheme for high density SRAM

Integrated level translator

Integrated level translator and latch for fence architecture

High performance multiplexed latches

Address based memory data path programming scheme

Stacked memory device control

MICRON TECHNOLOGY INC

Write command and write data timing circuit and methods for timing the same

Command paths, apparatuses, memories, and methods for providing internal commands to a data path

Circuits, devices, systems, and methods of operation for a linear output driver

Systems, circuits, and methods for charge sharing

Systems and methods for issuing address and data signals to a memory array

Asymmetric read-write sequence for interconnected dies

Through-substrate via (TSV) testing

Systems, circuits, and methods for charge sharing

Write command and write data timing circuit and methods for timing the same

Systems and methods for issuing address and data signals to a memory array

Methods, devices, and systems for a high voltage tolerant buffer

Methods, devices, and systems for a high voltage tolerant buffer

IBM

Memory cells with read access schemes

Refresh hidden eDRAM memory

Boost control to improve SRAM write operation

Low power static random access memory (SRAM) read data path

Circuit to improve SRAM stability

Minimization of bias temperature instability (BTI) degradation in circuits

BRINGIVIJAYARAGHAVAN VENKATRAGHAVAN

Command paths, apparatuses, memories, and methods for providing internal commands to a data path

Write command and write data timing circuit and methods for timing the same

Through-substrate via (TSV) testing

Command paths, apparatuses and methods for providing a command to a data block

Circuits, apparatuses, and methods for delay models

Systems, circuits, and methods for charge sharing

MARVELL ASIA PTE LTD

Multi-sense amplifier based access to a single port of a memory cell

Skewed sense amplifier for single-ended sensing

Row address comparator for a row redundancy control circuit in a memory

BROWN JASON M

Apparatus and methods having majority bit detection

Apparatus and methods having majority bit detection

MARVELL INT LTD

Multiple sense amplifier and data path-based pseudo dual port SRAM

Multi-port memory architecture for a systolic array

NANYA TECHNOLOGY CORP

Memory device

MICRON TECHNOLOY INC

Systems, circuits, and methods for charge sharing