Inventor

Zhuang hui-zhong

TW266 patents

⚠️ This page may combine multiple inventors who share the name “Zhuang hui-zhong”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

Zhuang hui-zhong

TAIWAN SEMICONDUCTOR MFG CO LTD

Flip-flop with delineated layout for reduced footprint

Integrated circuit and method of forming an integrated circuit

Integrated circuit and method of forming an integrated circuit

System and method of processing cutting layout and example switching circuit

Low-power flip-flop architecture with high-speed transmission gates

Cell structure with intermediate metal layers for power supplies

Integrated circuit and method of manufacturing same

Power rail with non-linear edge

Semiconductor device and method of manufacturing the same

Buried metal track and methods forming same

Integrated circuit layout method, device, and system

Double height cell regions, semiconductor device having the same, and method of generating a layout diagram corresponding to the same

Integrated circuit, system for and method of forming an integrated circuit

Integrated circuit and method of manufacturing same

Semiconductor device having engineering change order (ECO) cells and method of using

Flip-flop with delineated layout for reduced footprint

Buried metal track and methods forming same

Layout of standard cells for predetermined function in integrated circuits

Flip-flop with delineated layout for reduced footprint

Method of forming layout design

System and method of layout design for integrated circuits

Standard cell having cell height being non-integral multiple of nominal minimum pitch

Method and system of layout placement based on multilayer gridlines

Standard cells for predetermined function having different types of layout

Semiconductor device and method of manufacturing semiconductor device

Method for designing antenna cell that prevents plasma induced gate dielectric damage in semiconductor integrated circuits

Cell layout design and method

Metal cut optimization for standard cells

Semiconductor structure

Circuits and structures including tap cells and fabrication methods thereof

Cell layout and structure

Semiconductor device and methods of manufacturing same

Integrated circuit device and method

Footprint for multi-bit flip flop

Tie off device

Clock gating circuit and method of operating the same

Semiconductor device and method of manufacturing the same

Flip-flop circuit and method

Power rail with non-linear edge

Clock gating circuit and method of operating the same

Double rule integrated circuit layouts for a dual transmission gate

Staking nanosheet transistors

Cell structure having different poly extension lengths

Integrated circuit

TAIWAN SEMICONDUCTOR MFG

Masks formed based on integrated circuit layout design having standard cell that includes extended active region

Method of forming layout design

Masks formed based on integrated circuit layout design having cell that includes extended active region

Standard cell metal structure directly over polysilicon structure

Integrated circuit

Multiple via connections using connectivity rings