Inventor
BANIN ELAN
IL37 patents
⚠️ This page may combine multiple inventors who share the name “BANIN ELAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
24 patentsUS11387852B2Jul 12, 2022
Time encoded data communication protocol, apparatus and method for generating and receiving a data signal
INTEL CORP22 citations91
US11121731B2Sep 14, 2021
Digital radio head control
INTEL CORP5 citations83
US10459407B1Oct 29, 2019
DTC based carrier shift—online calibration
INTEL CORP14 citations83
US11870449B2Jan 9, 2024
Systems and methods for calibrating digital phase-locked loops
INTEL CORP4 citations74
US11095427B1Aug 17, 2021
Transceiver with inseparable modulator demodulator circuits
INTEL CORP4 citations72
US9374197B2Jun 21, 2016
Methods and arrangements for direct current estimation of a wireless communication packet
INTEL CORP4 citations72
US11979177B2May 7, 2024
Time encoded data communication protocol, apparatus and method for generating and receiving a data signal
INTEL CORP2 citations70
US12191871B2Jan 7, 2025
Methods and devices for TDC resolution improvement
INTEL CORP1 citations63
US12543129B2Feb 3, 2026
Employing dithered clock in distributed radio system
INTEL CORP0 citations62
US12531583B2Jan 20, 2026
Apparatus, system and method of transmitting a wideband radio frequency (RF) transmit (TX) signal
INTEL CORP0 citations62
US11991265B2May 21, 2024
Methods and devices for asymmetric frequency spreading
INTEL CORP0 citations62
US11949441B2Apr 2, 2024
Transmitter and method for generating radio frequency transmit signal, mobile device and base station
INTEL CORP0 citations62
US11283456B2Mar 22, 2022
Apparatuses for generating an oscillation signal
INTEL CORP0 citations62
US9106502B2Aug 11, 2015
Apparatus, system and method of in-phase/quadrature (I/Q) imbalance compensation
INTEL CORP3 citations62
US12598053B2Apr 7, 2026
Distributed radio feed-forward clock synchronization
INTEL CORP0 citations61
US12101683B2Sep 24, 2024
Proximity detection using wi-fi channel state information
INTEL CORP0 citations59
US10788794B2Sep 29, 2020
DTC based carrier shift—online calibration
INTEL CORP1 citations59
US11088891B1Aug 10, 2021
Methods and devices generating a calibration signal for an IQ imbalance
INTEL CORP0 citations57
US11902062B2Feb 13, 2024
Apparatus and method for transmitting a bit in addition to a plurality of payload data symbols of a communication protocol, and apparatus and method for decoding a data signal
INTEL CORP0 citations52
US10659061B2May 19, 2020
Divider-less fractional PLL architecture
INTEL CORP0 citations51
US12429829B2Sep 30, 2025
Digital-to-time converter (DTC) non-linearity predistortion
INTEL CORP0 citations48
US12206496B2Jan 21, 2025
Apparatus, system and method of encoding/decoding data according to a parity function
INTEL CORP0 citations48
US11592339B2Feb 28, 2023
Device and method for determining a model related to a temperature shift
INTEL CORP0 citations47
US9419829B2Aug 16, 2016
Apparatus, system and method of direct current (DC) estimation of a wireless communication packet
INTEL CORP0 citations41
INTEL IP CORP
12 patentsUS10181856B2Jan 15, 2019
Digital phase locked loop frequency estimation
INTEL IP CORP5 citations83
US9923563B1Mar 20, 2018
Deterministic jitter removal using a closed loop digital-analog mechanism
INTEL IP CORP14 citations81
US9231602B1Jan 5, 2016
A-priori-probability-phase-estimation for digital phase-locked loops
INTEL IP CORP6 citations73
US9912357B1Mar 6, 2018
Digital polar transmitter having a digital front end
INTEL IP CORP5 citations72
US9698863B2Jul 4, 2017
Methods and arrangements for spur estimation of a wireless communication packet
INTEL IP CORP2 citations72
US9571107B2Feb 14, 2017
High-order sigma delta for a divider-less digital phase-locked loop
INTEL IP CORP0 citations52
US10680619B2Jun 9, 2020
Digital phase locked loop frequency estimation
INTEL IP CORP0 citations51
US10027356B2Jul 17, 2018
Zero-cross-pre-distortion (ZCPD) algorithm for DTC based polar DTx
INTEL IP CORP1 citations51
US10686451B2Jun 16, 2020
DPLL with adjustable delay in integer operation mode
INTEL IP CORP0 citations50
US10768580B2Sep 8, 2020
Time-to-digital converter, digital phase-locked loop, method for operating a time-to-digital converter, and method for a digital phase-locked loop
INTEL IP CORP0 citations48
US10263624B2Apr 16, 2019
Phase synchronization between two phase locked loops
INTEL IP CORP0 citations48
US10707880B2Jul 7, 2020
Circuit, apparatus, digital phase locked loop, receiver, transceiver, mobile device, method and computer program to reduce noise in a phase signal
INTEL IP CORP0 citations47